Avago Technologies LSI8751D - Manual (Page 271)

PCI and External Memory Interface Timing Diagrams 7-35
Figure 7.22 Write Cycle, Normal/Fast Memory (
≥
64 Kbytes), Single Byte Access
(Cont.)
t
23
CLK
MAD
(Driven by LSI53C875)
MAS2/
(Driven by LSI53C875)
MAS1/
(Driven by LSI53C875)
MCE/
(Driven by LSI53C875)
MOE/
(Driven by LSI53C875)
MWE/
(Driven by LSI53C875)
10 11 12 13 14 15 16 17 18
MAS0/
(Driven by LSI53C875)
t
24f
Valid
Write Data
t
25
t
20
19
t
26
t
21
t
22f