Lucent Technologies MN10285K - Manual (Page 171)

On-Screen Display
VRAM
Panasonic Semiconductor Development Company MN102H75K/F75K/85K/F85K LSI User Manual
170
Panasonic
A. GEXTE = 1
B. GEXTE = 0
Figure 7-7 Graphics VRAM Organization for Two Modes
GRAMEND − 3F
GRAMEND − 3E
GRAMEND − 3D
GRAMEND − 3C
GRAMEND − 3B
GRAMEND − 3A
GRAMEND − 2F
GRAMEND − 2E
GRAMEND − 3
GRAMEND − 2
GRAMEND − 1
GRAMEND
Unused area
Unused area
Code 30
Code 29
.
.
.
Code 2
Code 1 2 bytes
Low-order 8 bits
of graphics code
High-order 8 bits
of graphics code
GRAMEND − 40 × N + 5
GRAMEND − 40 × (N − 1)
GRAMEND − 40 × n + 5
GRAMEND − 40 × (n − 1)
GRAMEND − 7B
GRAMEND − 40
GRAMEND − 3B
GRAMEND
Line N data
.
.
.
Line n data
.
.
.
Line 2 data
Line 1 data 64 bytes
GRAMEND − 27
GRAMEND − 26
GRAMEND − 25
GRAMEND − 24
GRAMEND − 23
GRAMEND − 22
GRAMEND − 5
GRAMEND − 4
GRAMEND − 3
GRAMEND − 2
GRAMEND − 1
GRAMEND
Code 20
Code 19
Code 18
.
.
.
Code 3
Code 2
Code 1 2 bytes
Low-order 8 bits
of graphics code
High-order 8 bits
of graphics code
GRAMEND − 28 × N + 1
GRAMEND − 28 × (N − 1)
GRAMEND − 28 × n + 1
GRAMEND − 28 × (n − 1)
GRAMEND − 4F
GRAMEND − 28
GRAMEND − 27
GRAMEND
Line N data
.
.
.
Line n data
.
.
.
Line 2 data
Line 1 data 40 bytes