Interrupts, No interrupt requested 1: interrupt requested, Interrupt undetected 1: interrupt detected – Lucent Technologies MN10285K User Manual
Page 64: Disable 1: enable, Adm1ir: address match 1 interrupt request flag, Adm1id: address match 1 interrupt detect flag, Adm1ie: address match 1 interrupt enable flag, Adm0ir: address match 0 interrupt request flag, Adm0id: address match 0 interrupt detect flag
Interrupts
Interrupt Control Registers
MN102H75K/F75K/85K/F85K LSI User Manual
Panasonic Semiconductor Development Company
63
Panasonic
ADM1ICL: Address 1 Match Interrupt Control Register (Low)
x’00FC7C’
ADM1ICL detects and requests address match 1 interrupts. It is an 8-bit
access register. Use the MOVB instruction to access it.
ADM1IR: Address match 1 interrupt request flag
0: No interrupt requested
1: Interrupt requested
ADM1ID: Address match 1 interrupt detect flag
0: Interrupt undetected
1: Interrupt detected
ADM1ICH: Address 1 Match Interrupt Control Register (High)
x’00FC7D’
ADM1ICH enables address match 1 interrupts. It is an 8-bit access register.
Use the MOVB instruction to access it.
The priority level for address match 1 interrupts is written to the
ADM3LV[2:0] field of the ADM3ICH register.
ADM1IE: Address match 1 interrupt enable flag
0: Disable
1: Enable
ADM0ICL: Address 0 Match Interrupt Control Register (Low)
x’00FC7E’
ADM0ICL detects and requests address match 0 interrupts. It is an 8-bit
access register. Use the MOVB instruction to access it.
ADM0IR: Address match 0 interrupt request flag
0: No interrupt requested
1: Interrupt requested
ADM0ID: Address match 0 interrupt detect flag
0: Interrupt undetected
1: Interrupt detected
Bit:
7
6
5
4
3
2
1
0
—
—
—
ADM1
IR
—
—
—
ADM1
ID
Reset:
0
0
0
0
0
0
0
0
R/W:
R
R
R
R/W
R
R
R
R
Bit:
7
6
5
4
3
2
1
0
—
—
—
—
—
—
—
ADM1
IE
Reset:
0
0
0
0
0
0
0
0
R/W:
R
R
R
R
R
R
R
R/W
Bit:
7
6
5
4
3
2
1
0
—
—
—
ADM0
IR
—
—
—
ADM0
ID
Reset:
0
0
0
0
0
0
0
0
R/W:
R
R
R
R/W
R
R
R
R