Interrupts, No interrupt requested 1: interrupt requested, Interrupt undetected 1: interrupt detected – Lucent Technologies MN10285K User Manual
Page 66: Disable 1: enable
Interrupts
Interrupt Control Registers
MN102H75K/F75K/85K/F85K LSI User Manual
Panasonic Semiconductor Development Company
65
Panasonic
SCT0ICL: Serial 0 Transmission End Interrupt Control Register (Low) x’00FC82’
SCT0ICL detects and requests serial 0 transmission end interrupts. It is an
8-bit access register. Use the MOVB instruction to access it.
SCT0IR: Serial 0 transmission end interrupt request flag
0: No interrupt requested
1: Interrupt requested
SCT0ID: Serial 0 transmission end interrupt detect flag
0: Interrupt undetected
1: Interrupt detected
SCT0ICH: Serial 0 Transmission End Interrupt Control Register (High) x’00FC83’
SCT0ICH enables serial 0 transmission end interrupts. It is an 8-bit access reg-
ister. Use the MOVB instruction to access it.
The priority level for serial 0 transmission end interrupts is written to the
ANLV[2:0] field of the ANICH register.
SCT0IE: Serial 0 transmission end interrupt enable flag
0: Disable
1: Enable
SCR0ICL: Serial 0 Reception End Interrupt Control Register (Low)
x’00FC84’
SCR0ICL detects and requests serial 0 reception end interrupts. It is an 8-
bit access register. Use the MOVB instruction to access it.
SCT0IR: Serial 0 reception end interrupt request flag
0: No interrupt requested
1: Interrupt requested
SCT0ID: Serial 0 reception end interrupt detect flag
0: Interrupt undetected
1: Interrupt detected
Bit:
7
6
5
4
3
2
1
0
—
—
—
SCT0
IR
—
—
—
SCT0
ID
Reset:
0
0
0
0
0
0
0
0
R/W:
R
R
R
R/W
R
R
R
R
Bit:
7
6
5
4
3
2
1
0
—
—
—
—
—
—
—
SCT0
IE
Reset:
0
0
0
0
0
0
0
0
R/W:
R
R
R
R
R
R
R
R/W
Bit:
7
6
5
4
3
2
1
0
—
—
—
SCR0
IR
—
—
—
SCR0
ID
Reset:
0
0
0
0
0
0
0
0
R/W:
R
R
R
R/W
R
R
R
R