About this manual, Using this manual, Text conventions – Lucent Technologies MN10285K User Manual
Page 17: Register conventions
About This Manual
Using This Manual
Panasonic Semiconductor Development Company
MN102H75K/F75K/85K/F85K LSI User Manual
16
Panasonic
About This Manual
This manual is intended for assembly-language programming engineers. It
describes the internal configuration and hardware functions of the MN102H75K
and MN102H85K microcontrollers. Except when discusssiing differing specifi-
cations,this manual refers to the two microcontrollers as a single device :
MN102H75K/85K.
Using This Manual
The chapters in this manual deal with the internal blocks of the MN102H75K/
85K. Chapters 1 to 5 provide an overview of the MN102H75K/85K’s general
specifications, interrupts, power modes, timers, and serial connections. Chapters
6 to 10 describe the on-screen display and other specialized functions available
with the MN102H75K/85K. Chapter 11 provides the I/O port specifications,
chapter 12 describes the ROM correction feature, chapter 13 describes the I
2
C
interface, and chapter 14 describes the H scan line counter. Appendix A provides
a register map, and Appendix B describes the flash EEPROM version.
Text Conventions
Where applicable, this manual provides special notes and warnings. Helpful or
supplementary comments appear in the sidebar. In addition, the following
symbols indicate key information and warnings:
Register Conventions
This manual presents 8- and 16-bit registers in the following format:
REGISTER: Register Name
x’000000’
The hexadecimal value (x’000000’) indicates the register address. The top row of
the register diagram holds the bit numbers. Bit 15 is the most significant bit
(MSB). The second row holds the bit or field names. A dash (—) indicates a
reserved bit. The third row shows the reset values, and the fourth row shows the
accessibility. (R = read only, W = write only, and R/W = readable/writable.)
Key information
These notes summarize key points relating to an operation.
Warning
Please read and follow these instructions to prevent damage or
reduced performance.
Bit:
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
—
—
—
Bit
Name
Bit
Name
Bit
Name
Bit
Name
Bit
Name
Bit
Name
Bit
Name
Bit
Name
Bit
Name
Bit
Name
Bit
Name
Bit
Name
Bit
Name
Reset:
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
R/W:
R
R
R
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W