1 pre-configuring, 2 setting up the first interrupt – Lucent Technologies MN10285K User Manual

Page 303

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I

2

C Bus Controller

I

2

C Interface Setup Examples

Panasonic Semiconductor Development Company

MN102H75K/F75K/85K/F85K LSI User Manual

302

Panasonic

13.6.2 Setting Up a Transition from Slave Receiver to Slave

Transmitter

This example demonstrates how to set up a data transfer when changing from
slave receiver to slave transmitter. Figure 13-8 shows an example waveform.

13.6.2.1 Pre-configuring

To set up the I/O port:

Set port control register 0 (PCNT0; x’00FF90’) to x’0300’ (enabling the SDA1
and SCL1 pins) and set the port 0 output mode register (P0MD; x’00FFF0’) to

x’0006’ (selecting the SDA1 and SCL1 functions).

To enable I

2

C interrupts:

Set the I

2

C interrupt control register pair (I2C0ICH and I2C0ICL; x’00FC9C’) to

x’0100’.

To set up the I

2

C registers:

1.

Set the I2CMYAD register (x’007E44’) to x’0024’. This sets the slave
address of the microcontroller.

2.

Set the I2CDTRM register (x’007E40’) to x’0000’. This sets STA, STP,
ACK, and the transmission data to 0s. With this setting, the microcontroller

returns an ACK = 0 signal when an address match occurs. The master sends
data (the slave address) to the slave microcontroller in sync with the master

clock. When the R/W bit = 1, the microcontroller changes from a slave
receiver to a slave transmitter.

13.6.2.2 Setting Up the First Interrupt
Once the microcontroller becomes a slave transmitter, set up the transmission

data.

To set up the interrupt:

Set the I2C0ICH and I2C0ICL register pair (x’00FC9C’) to x’0100’. This
enables I

2

C interrupts and clears the previous interrupt request.

To set up the I

2

C registers:

1.

Read the I2CDREC register (x’007E42’) to determine the I

2

C bus controller

status. AAS should be 1.

2.

Set the I2CDTRM register (x’007E40’) to x’0155’. This sets STA to 0, STP

to 0, ACK to 1, and the transmission data to x’55’. The microcontroller does
not need to issue an ACK signal in this transfer, so the ACK bit should be 1.

3.

Begin transmitting data in sync with the clock from the master.

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