Lucent Technologies MN10285K - Manual (Page 31)

General Description
Pin Descriptions
Panasonic Semiconductor Development Company MN102H75K/F75K/85K/F85K LSI User Manual
30
Panasonic
1.6 Pin Descriptions
1.6.1 MN102H85K Pin Description
Notes: 1. Pins marked with an asterisk (*) are N-channel, open-drain pins.
2. Pin 25 is V
DD
in the MN102H85K and V
PP
in the MN102HF85K.
Figure 1-9 MN102H85K Pin Configuration in Single-Chip Mode
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
64
63
62
61
60
59
58
57
56
55
54
53
52
51
50
49
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
VSS
OSC2
OSC1
VDD
P61, SCL0 *
P60, SDA0 *
P57, SBT0
P56, SBI0, SBD0
P55, SBO0
P54, IRQ5, VSYNC
P53, RST
P52, IRQ4, VI0
TEST
P51, YS
P50, SYSCLK
P47, HSYNC
P46, OSDXI
P45, OSDXO
P44, TM5IC, HI1 *
P43, TM5IOB, HI0 *
P42, TM5IOA *
P41, TM1IO *
VCOI
PDO
P40, DAYMOUT, YM
P37, DABOUT, B
P36, DAGOUT, G
P35, DAROUT, R
VREF, P34
IREF
COMP
AVDD
P00, RMIN, IRQ0
* P01, SDA1
* P02, SCL1
P03, ADIN0
P04, ADIN1
P05, ADIN2
P06, ADIN3
P07, ADIN4
P10, ADIN5, IRQ1
P11, ADIN6, IRQ2
P12, ADIN7, IRQ3
P13, ADIN8, WDOUT
P14, ADIN9, STOP
P15, ADIN10, PWM0
P16, ADIN11, PWM1
P17, PWM2
P20, PWM3
P21, PWM4
P22, PWM5
P23, PWM6
P24, TM4IC, SBT1
P25, TM4IOB, SBI1, SBD1
P26, TM4IOA, SBO1
P27, TM0IO
VDD (VPP)
P30, CLH
VREFHS
P31, CVBS0
VSS
P32, CVBS1
VREFLS
P33, CLL
64-Pin SDIP
Top View