Lucent Technologies MN10285K - Manual (Page 37)

General Description
Bus Interface
Panasonic Semiconductor Development Company MN102H75K/F75K/85K/F85K LSI User Manual
36
Panasonic
1.7.2 Bus Interface Control Registers
The external memory wait register (EXWMD) and memory mode register 1
(MEMMD1) control the bus interface.
EXWMD: External Memory Wait Register x’00FF80’
EW[33:30], EW[23:20], EW[13:10], EW[03:00]
These fields contain the wait settings for external memory spaces 3, 2, 1,
and 0, respectively. One wait corresponds to one instruction cycle. When
the external oscillator is 4 MHz, one wait is 83 ns.
The OSD, VBI0, VBI1, I2C, IR remote signal receiver, and H counter
blocks apply to external memory space 0.
MEMMD1: Memory Mode Register 1 x’00FF82’
Write 0s to bits 15 to 2.
IOW[1:0]: Wait setting for internal I/O space
00: 1 wait
01: Reserved
10: 2 waits
11: 3 waits
B it: 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
EW 33 EW 32 EW 31 EW 30 EW 23 EW 22 EW 21 EW 20 EW 13 EW 12 EW 11 EW 10 EW 03 EW 02 EW 01 EW 00
Reset: 1 1 1 0 1 1 1 0 1 1 1 0 1 1 1 0
R /W : R/W R/W R/W R /W R/W R/W R/W R /W R/W R/W R/W R /W R/W R/W R/W R /W
Table 1-4 Wait Count Settings
EW[n3:n0] Setting Wait Count Cycles
0000 0.0 1.0
0001 R eserved
0010 1.0 2.0
0011 R eserved
0100 2.0 3.0
0101 R eserved
0110 3.0 4.0
0111 R eserved
1000 4.0 5.0
1001 R eserved
1010 5.0 6.0
1011 R eserved
1100 6.0 7.0
1101 R eserved
1110 7.0 8.0
1111 R eserved
B it: 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
EB31 EB32 EB 21 EB20 EB11 EB10 EB 01 EB00 BRS1 B RS0 B RC3 BR C2 BRC 1 BRC 0 IO W 1 IO W 0
Reset: 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 1
R /W : R/W R/W R/W R /W R/W R/W R/W R /W R/W R/W R/W R /W R/W R/W R/W R /W