AMD SB600 - Manual (Page 113)

©2008 Advanced Micro Devices, Inc. SMBus Module and ACPI Block (Device 20, Function 0)
AMD SB600 Register Reference Manual Proprietary Page 113
SmartPowerControl2C - RW – 8 bits - [PCI_Reg: 9Ah]
Field Name Bits Default Description
SmartVoltEnable2 7 0b Enable bit for the SmartPower2 function. When set, the logic
will monitor the logic (defined by 98h). If all of the
corresponding modules are idle,
SmartPowerControl2C register
SmartVolt function is meant to provide a mechanism to control the external power supply in order to reduce
additional system power consumption. For example, software can set SmartPowerControl2A[6] and
SmartPowerControl2A[7]. Whenever CPU enters C3 state and IDE (PATA) controller is not active, this function will
assert GPIO5. System design can use this signal to control the power supply to reduce the ATA power by 5~10%.
Another example is to connect an ambient light sensor to one of the VIN inputs. When the circuit has detected the
ambient light is below certain threshold, this function can automatically dim the LCD back light.
IDE_GPIO_Cntrl – RW - 32 bits - [PCI_Reg:A0]
Field Name Bits Default Description
GPIO_Out 15:0 0000h When the IDE bus is used as GPIO, these bits control the
output of each IDE data bit; providing the corresponding bits
[31:16] are enabled
GPIO_Out_En# 31:16 FFFFh When the IDE bus is used as GPIO, these bits control the
output enable of each IDE data bit.
0 = Enable
1 = Tristate
IDE_GPIO_Cntrl register
IDE_GPIO_In – R - 16 bits - [PCI_Reg: A4h]
Field Name Bits Default Description
GPIO_Status 15:0 ---- When the IDE bus is used as GPIIO, these are the read ports
for each IDE data bit.
IDE_GPIO_In register
GPIO_48_47_46_37_Cntrl - RW – 16 bits - [PCI_Reg: A6h]
Field Name Bits Default Description
GPIO_Out 3:0 0h Write 1 to set and 0 to clear each of the GPIO port providing
the corresponding bits [7:4] and [15:12] are enabled
Bit[0] for GPIO37/DPSLP_OD#
Bit[1] for GPIO46/AZ_SDIN3
Bit[2] for GPIO47/SPI_CLK
Bit[3] for GPIO48/FANOUT1
GPIO_Out_En# 7:4 Fh GPIO output port enable for each of the GPIO port
0: Output = GPIO_Out
1: Output = tristate
GPIO_Status 11:8 - GPIO input status for each of the GPIO port
GPIO_Enable 15:12 0h GPIO function enable for each of the GPIO port
0: GPIO disabled
1: GPIO enabled
Bit[13] [15] no effect
Use PM_Reg: 60h bit [2] to configure GPIO48/FANOUT1.
GPIO_48_47_46_37_Cntrl register