AMD SB600 User Manual

Page 228

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©2008 Advanced Micro Devices, Inc.

HD Audio Controllers Registers

AMD SB600 Register Reference Manual

Proprietary

Page 228

PCI Command – RW – 16 bits – [PCI_Reg: 04h]

Field Name

Bits

Default

Description

Reserved 0

0b

Reserved.

Memory Space Enable

1

0b

Enables the HD Audio controller to respond to PCI memory
space access.

Bus Master Enable

2

0b

Enables the HD Audio controller’s bus mastering capability.

Reserved 9:3

00h

Reserved

Interrupt Disable

10

0b

Disables the device from asserting INTx#.
Note: This bit does not affect the generation of MSI.

Reserved 15:11

00h

Reserved

PCI Status – RW – 16 bits – [PCI_Reg: 06h]

Field Name

Bits

Default

Description

Reserved 2:0

0h

Reserved

Interrupt Status

3

0b

This bit is a “1” when INTx# is asserted.
Note: This bit is not set by MSI.

Capabilities List

4

1b

This bit is hardwired to “1” to indicate that the HD Audio
controller contains a capability pointer list. The first item at
offset 34h

Reserved 12:5

00h

Reserved

Received Master Abort

13

0

When set, this bit indicates that the HD Audio controller
terminated a PCI bus operation with a Master Abort.

Reserved 15:14

0h

Reserved

Revision ID – R – 8 bits – [PCI_Reg: 08h]

Field Name

Bits

Default

Description

Revision ID

7:0

00h

These bits are hardwired to “0” to indicate the revision level
of the chip design (for the SB600).

Programming Interface – R – 8 bits – [PCI_Reg: 09h]

Field Name

Bits

Default

Description

Programming Interface

7:0

00h Programming

Interface.

Sub Class Code – R – 8 bits – [PCI_Reg: 0Ah]

Field Name

Bits

Default

Description

Sub Class Code

7:0

03h

Sub Class Code. Indicates a HD Audio device in the
context of a multimedia device class.

Base Class Code – R – 8 bits – [PCI_Reg: 0Bh]

Field Name

Bits

Default

Description

Base Class Code

7:0

04h

Base Class Code. Indicates a multimedia device.

Cache Line Size – RW – 8bits – [PCI_Reg: 0Ch]

Field Name

Bits

Default

Description

Cache Line Size

7:0

00h

This field is implemented as a read/write field for legacy
compatibility purposes only and has no functional impact.

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