AMD SB600 User Manual

Page 118

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©2008 Advanced Micro Devices, Inc.

SMBus Module and ACPI Block (Device 20, Function 0)

AMD SB600 Register Reference Manual

Proprietary

Page 118

I2CShadow1- RW - 8 bits - [PCI_Reg: D4h]

Field Name

Bits

Default

Description

I2CShadow1 register

I2Cshadow2- RW - 8 bits - [PCI_Reg: D5h]

Field Name

Bits

Default

Description

Read/Write ShadowPort2

0

0b

Read/Write for Shadow Port 2
This bit must be programmed to 0 because I2C slave
controller only responds to Word Write Transaction.

I2CslaveAddr2

7:1

00h

SMBus Slave Address for shadow port 2
This value specifies the address used to match against
incoming I2C addresses for Shadow port 2.

I2Cshadow2 register

I2CBusRevision - RW - 8 bits - [PCI_Reg: D6h]

Field Name

Bits

Default

Description

I2CbusRevision 7:0

00h

Revision

ID

I2CBusRevision register

MSI_Weight - RW – 8 bits - [PCI_Reg: E0h]

Bits

Default

Description

MSI_weight

5:0

100000b

Used by bios to tune MSI messaging priority

Reserved 7:6

00b

MSI_Weight register

AB_REG_BAR - RW - 32 bits - [PCI_Reg: F0h]

Field Name

Bits

Default

Description

AB_REG_BAR 31:0

0000_000

0h

Base Address for A-link Bridge Register

AB_REG_BAR register

WakeIoAddr- RW - 16 bits - [PCI_Reg: F4h]

Field Name

Bits

Default

Description

WakeIoAddr

15:0

0000h

IO Address for C-State Wake-up by CPU (K8 only). The BIOS
can program an address inside K8 and this location. The K8
can then use it to generate an IO write to tell SB to wake from
C state (location inside K8 is TBD).

WakeIoAddr register

MwaitID- RW - 8 bits - [PCI_Reg: F6h]

Field Name

Bits

Default

Description

Mwait_physical_ID

3:0

0100b

This is used for P4 dual core system. Two physical CPU IDs
with default values 00 and 01 to match with addr[19:18] of
MWAIT and ADS_after_MWAIT. Usage TBD

Mwait_logical_ID

7:4

0100b

This is used for P4 dual core system. Two logical CPU IDs
with default values 00 and 01 to match with addr[17:16] of
MWAIT and ADS_after_MWAIT. Usage TBD

MwaitID register

MwaitSts- R - 8 bits - [PCI_Reg: F7h]

Field Name

Bits

Default

Description

Mwait_cpu0_sts

0

0b

Set to 1 by MWAIT with addr[19:18] = Mwait_physical_ID[1:0]
and addr[17:16] = Mwait_logical_ID[1:0]. Cleared by
ADS_after_MWAIT with the same addr[19:16].

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