AMD SB600 User Manual

Page 263

Advertising
background image


©2008 Advanced Micro Devices, Inc.

LPC ISA Bridge (Device 20, Function 3)

AMD SB600 Register Reference Manual

Proprietary

Page 263

SPI_CmdValue1 Register- RW - 32 bits - [Mem_Reg 14h]

Field Name

Bits

Default

Description

WREN

7:0

06h

This is used to compare against the opcode sent out by the
MAC. This is a predefined value to decode for the WREN (write
enable) command from the MAC. In the bridge mode, SB600
will need to decode commands from the MAC

WRDI

15:8

04h

This is used to compare against the opcode sent out by the
MAC. This is a predefined value to decode for the WRDI (write
disable) command from the MAC.

RDID

23:16

9Fh

This is used to compare against the opcode sent out by the
MAC. This is a predefined value to decode for the RDID (read
ID) command from the MAC

RDSR

31:24

05h

This is used to compare against the opcode sent out by the
MAC. This is a predefined value to decode for the RDSR (read
status register) command from the MAC

Note: Either the SpiAccessMacRomEn and/or the SpiHostAccessRomEn bit is cleared. All of these registers
become read only and cannot be changed.

SPI_CmdValue2 Register- RW - 32 bits - [Mem_Reg 18h]

Field Name

Bits

Default

Description

Read

7:0

03h

This is used to compare against the opcode sent out by the
MAC. This is a predefined value to decode for the Read (Read
byte) command from the MAC. In the bridge mode, SB600 will
need to decode commands from the MAC

FRead

15:8

0Bh

This is used to compare against the opcode sent out by the
MAC. This is a predefined value to decode for the FRead (fast
read) command from the MAC.

PAGEWR

23:16

0Ah

This is used to compare against the opcode sent out by the
MAC. This is a predefined value to decode for the PAGEWR
(page write) command from the MAC

BYTEWR

31:24

02h

This is used to compare against the opcode sent out by the
MAC. This is a predefined value to decode for the BYTEWR
(byte write) command from the MAC.

Note: Either the SpiAccessMacRomEn and/or the SpiHostAccessRomEn bit is cleared. All of these registers
become read only and cannot be changed.

SPI_FakeID Register- RW - 8 bits - [Offset 1Ch]

Field Name

Bits

Default

Description

SPI_FakeID

7:0

FFh

This is used as the faked ID value to be returned to the MAC as
a response to the RDID command. This is only used under the
bridge mode.

Advertising