AMD SB600 User Manual
Page 95
©2008 Advanced Micro Devices, Inc.
OCHI USB 1.1 and EHCI USB 2.0 Controllers
AMD SB600 Register Reference Manual
Proprietary
Page 95
Data Buffer – RW - 64 bits - [DBug_Reg : DBase + 08h/0Ch]
Field Name
Bits
Default
Description
Data Buffer
63:0
00000000
_
00000000
h
The least significant byte is accessed at offset 08h and the most
significant byte is accessed at offset 0Fh. Each byte in Data Buffer can
be individually accessed. Data Buffer must be written with data before
software initiates a write request. For a read request, Data Buffer
contains valid data when Done is set, Error/Good# is cleared, and Data
Length
specifies the number of bytes that are valid. Reset default =
undefined.
Device Address – RW - 32 bits - [DBUG_Reg : DBase + 10h]
Field Name
Bits
Default
Description
USB Endpoint
3:0
1h
4-bit field that identifies the endpoint used by the controller for all Token
PID generation.
Reserved 7:4
Reserved
USB Address
14:8
7Fh
7-bit field that identifies the USB device address used by the controller
for all Token PID generation.
Reserved 31:15
Reserved