AMD SB600 - Manual (Page 67)

©2008 Advanced Micro Devices, Inc. OCHI USB 1.1 and EHCI USB 2.0 Controllers
AMD SB600 Register Reference Manual Proprietary Page 67
standard OpenHCI descriptor-based accesses. The emulation code sets up the appropriate Endpoint
Descriptors and Transfer Descriptors that cause data to be sent to or received from a USB keyboard/mouse
using the normal USB protocols. When data is received from the keyboard/mouse, the emulation code is
notified and becomes responsible for translating the USB keyboard/mouse data into a data sequence that is
equivalent to what would be produced by a PS/2-compatible keyboard/mouse interface. The translated data
is made available to the system through the legacy keyboard interface I/O addresses at 60h and 64h.
Likewise, when data/control is to be sent to the keyboard (as indicated by the system writing to the legacy
keyboard interface), the emulation code is notified and becomes responsible for translating the information
into appropriate data to be sent to the USB keyboard/mouse through the transfer descriptor mechanism.
On the PS/2 keyboard/mouse interface, a read of I/O port 60h returns the current contents of the keyboard
output buffer; a read of I’O port 64h returns the contents of the keyboard status register. An I/O write to port
60h or 64h puts data into the keyboard input buffer (data is being input into the keyboard subsystem). When
emulation is enabled, reads and writes of registers 60h and 64h are captured in HceOutput, HceStatus,
and/or HceInput operational registers.
The emulation hardware described in this document supports a mixed environment in which either the
keyboard or mouse is located on USB, and the other device is attached to a standard PS/2 interface.
2.2.2.2 System Requirements
The sections below define the system requirements that must be met in order for the OpenHCI legacy
support to function properly.
Host Controller Mapping
The Host Controller uses memory addresses to enable system software to access its operational registers.
In a PCI implementation, the address of the Host Controller operations registers is set in BAR_OHCI. The
address range specified in BAR_OHCI must be accessible to SMM code. The address in BAR_OHCI should
not be modified by any software while the emulation software has control of the Host Controller. The only
exception to this is when the OS is booting and is trying to interrogate the PCI bus. It is common for an OS,
as it is loaded, to enumerate and ‘size’ the various buses on the machine. For a PCI system, the OS typically
writes a value to each card’s BAR to determine the memory space occupied by that card. If emulation is
running during enumeration, the Host Controller may generate an SMI as the OS is changing the BAR from
the value that the emulation code is using.
Intercept Port 60h and 64h Accesses
When emulation is enabled, I/O accesses of I/O ports 60h and 64h must be handled by the Host Controller.
The Host Controller must be positioned in the system so that it can do a positive decode of accesses to I/O
addresses 60h and 64h on the PCI bus. If a keyboard controller is present in the system, it must either use
subtractive decode or have provisions to disable its decode of ports 60h and 64h. If the legacy keyboard
controller uses positive decode and is turned off during emulation, it must be possible for the emulation code
to quickly re-enable and disable the legacy keyboard controller’s 60h and 64h decode. This is necessary to
support a mixed operating environment.
Interrupts
The Host Controller must connect to IRQ1 and IRQ12 on the system board and be wired OR with other non-
legacy IRQ1 and IRQ12 sources. IRQ1 and IRQ12 from the legacy keyboard controller (if present) must be
routed through the Host Controller.
Run-time Memory
Legacy emulation requires that the Host Controller have read/write access to a portion of system memory
that is not used by a system OS for any purpose. In addition, this memory must be accessible by the host
CPU while the host CPU is in SMM.