AMD SB600 - Manual (Page 39)

©2008 Advanced Micro Devices, Inc. SATA Registers (Device 18, Function 0)
AMD SB600 Register Reference Manual Proprietary Page 39
Port-N Serial ATA Status – R – 32 bits [Mem_reg: ABAR + port offset + 28h]
Field Name Bits Default Description
Interface Power
Management (IPM) 11:8 0h
Indicates the current interface state:
0h Device not present or communication not
established
1h Interface in active state
2h Interface in Partial power management state
6h Interface in Slumber power management state
All other values reserved. Read Only
Reserved 31:12 Reserved
Port-N Serial ATA Control – RW – 32 bits [Mem_reg: ABAR + port offset + 2Ch]
Field Name Bits Default Description
Device Detection
Initialization (DET) 3:0 0h
Controls the HBA’s device detection and interface
initialization.
0h No device detection or initialization action
requested
1h Perform interface communication initialization
sequence to establish communication. This is
functionally equivalent to a hard reset and results
in the interface being reset and communications
reinitialized. While this field is 1h, COMRESET is
transmitted on the interface. Software should
leave the DET field set to 1h for a minimum of 1
millisecond to ensure that a COMRESET is sent
on the interface.
4h Disable the Serial ATA interface and put Phy in
offline mode.
All other values reserved
This field may only be modified when P0CMD.ST is ‘0’.
Changing this field while the P0CMD.ST bit is set to ‘1’
results in undefined behavior. When P0CMD.ST is set to ‘1’,
this field should have a value of 0h.
Note: It is permissible to implement any of the Serial ATA
defined behaviors for transmission of COMRESET when
DET=1h.
Speed Allowed (SPD) 7:4 0h
Indicates the highest allowable speed of the interface.
0h No speed negotiation restrictions
1h Limit speed negotiation to Generation 1
communication rate
2h Limit speed negotiation to a rate not greater than
Generation 2 communication rate
All other values reserved