AMD SB600 - Manual (Page 42)

©2008 Advanced Micro Devices, Inc. SATA Registers (Device 18, Function 0)
AMD SB600 Register Reference Manual Proprietary Page 42
Port-N Serial ATA Error – RW – 32 bits [Mem_reg: ABAR + port offset + 30h]
Field Name Bits Default Description
Diagnostics (DIAG) 31:16 0000h
Contains diagnostic error information for use by diagnostic
software in validating correct operation or isolating failure
modes:
Write ‘1’ clears these bits
31:27 Reserved
26
Exchanged (X): When set to one this bit
indicates a COMINIT signal was received. This
bit is reflected in the P0IS.PCS bit.
25
Unknown FIS Type (F): Indicates that one or
more FISs were received by the Transport layer
with good CRC, but had a type field that was not
recognized/known.
24
Transport state transition error (T): Indicates
that an error has occurred in the transition from
one state to another within the Transport layer
since the last time this bit was cleared. This bit is
always 0 in current implementation.
23
Link Sequence Error (S): Indicates that one or
more Link state machine error conditions was
encountered. The Link Layer state machine
defines the conditions under which the link layer
detects an erroneous transition. This bit is always
0 in current implementation.
22
Handshake Error (H): Indicates that one or more
R_ERR handshake response was received in
response to frame transmission. Such errors may
be the result of a CRC error detected by the
recipient, a disparity or 8b/10b decoding error, or
other error condition leading to a negative
handshake on a transmitted frame.
21
CRC Error (C): Indicates that one or more CRC
errors occurred with the Link Layer.
20
Disparity Error (D): This field is not used by
AHCI. This bit is always 0 in current
implementation.
19
10B to 8B Decode Error (B): Indicates that one
or more 10B to 8B decoding errors occurred.
18
Comm Wake (W): Indicates that a Comm Wake
signal was detected by the Phy.
17
Phy Internal Error (I): Indicates that the Phy
detected some internal error. This bit is always 0
in current implementation.
16
PhyRdy Change (N): Indicates that the PhyRdy
signal changed state. This bit is reflected in the
P0IS.PRCS bit.