Altera HyperTransport MegaCore Function User Manual

Page 20

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2–12

Chapter 2: Getting Started

MegaCore Function Walkthrough

HyperTransport MegaCore Function User Guide

© November 2009

Altera Corporation

2. After the MegaCore function is generated, according to the message and progress

at the bottom of the generation report window, click Exit.

3. If you are prompted to add the Quartus II IP File (.qip) to the project, click Yes.

1

If you previously turned on Automatically add Quartus II IP Files to all
projects

, the .qip file is generated automatically.

You have generated an instance of the HyperTransport MegaCore function.

Table 2–1

describes the IP Toolbench-generated files, which are listed in the file

<variation name>.html in your project directory.

1

The .qip file is generated by the MegaWizard interface and contains information
about your generated IP core. You are prompted to add this .qip file to the current
Quartus II project at the time of file generation. In most cases, the .qip file contains all
of the necessary assignments and information required to process the core or system
in the Quartus II compiler. Generally, a single .qip file is generated for each MegaCore
function.

You can now integrate your custom megafunction in your design and compile the
design.

Table 2–1. IP Toolbench Files

(Note 1)

File Name

(2)

Description

<variation name>.vhd or .v

A MegaCore function variation file, which defines a VHDL or Verilog HDL top-level description
of the custom MegaCore function. Instantiate the entity defined by this file inside your design.
Include this file when compiling your design in the Quartus II software.

<variation name>_bb.v

Verilog HDL black-box file for the MegaCore function variation. Use this file when using a
third-party EDA tool to synthesize your design. This file is only produced when the Verilog
HDL language is selected.

<

variation name

>

.bsf

Quartus II symbol file for the MegaCore function variation. You can use this file in the
Quartus II block diagram editor.

<

variation name

>

.cmp

A VHDL component declaration file for the MegaCore function variation. Add the contents of
this file to any VHDL architecture that instantiates the MegaCore function. This file is only
produced when the VHDL language is selected.

<variation name>.vo or
<variation name>.vho

Verilog HDL or VHDL IP functional simulation model.

<

variation name

>

.qip

Contains Quartus II project information for your MegaCore function variation.

<

variation name

>

.html

The MegaCore function report file.

Notes to

Table 2–1

:

(1) These files are variation dependent; some may be absent or their names may change.

(2) <variation name> is the variation name selected by the user in the MegaWizard Plug-In Manager.

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