Altera HyperTransport MegaCore Function - Manual (Page 18)

2–10 Chapter 2: Getting Started
MegaCore Function Walkthrough
HyperTransport MegaCore Function User Guide © November 2009 Altera Corporation
2. Turn on Generate Simulation Model, as shown in Figure 2–10 .
3. Select the language in the Language list. In this case, Verilog HDL was chosen.
If you are synthesizing your design with a third-party EDA synthesis tool, you can
generate a netlist for the synthesis tool to estimate timing and resource usage for this
megafunction.
1. To generate a netlist, turn on Generate netlist.
2. Click OK.
Figure 2–9. Set Up Simulation
Figure 2–10. Generate Simulation Model