User-defined dip switch, User-defined leds, General leds – Altera Cyclone V E FPGA Development Board User Manual

Page 29: User-defined dip switch –21 user-defined leds –21, General leds –21

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Chapter 2: Board Components

2–21

General User Input/Output

March 2013

Altera Corporation

Cyclone V E FPGA Development Board

Reference Manual

Table 2–13

lists the user-defined push button schematic signal names and their

corresponding Cyclone V E FPGA pin numbers.

User-Defined DIP Switch

Board reference SW3 is a four-pin DIP switch. This switch is user-defined and
provides additional FPGA input control. When the switch is in the OFF position, a
logic 1 is selected. When the switch is in the ON position, a logic 0 is selected. There
are no board-specific functions for this switch.

Table 2–14

lists the user-defined DIP switch schematic signal names and their

corresponding Cyclone V E FPGA pin numbers.

User-Defined LEDs

The development board includes general and HSMC user-defined LEDs. This section
describes all user-defined LEDs. For information on board specific or status LEDs,
refer to

“Status Elements” on page 2–15

.

General LEDs

Board references D28 through D31 are four user-defined LEDs. The status and
debugging signals are driven to the LEDs from the designs loaded into the
Cyclone V E FPGA. Driving a logic 0 on the I/O port turns the LED on while driving a
logic 1 turns the LED off. There are no board-specific functions for these LEDs.

Table 2–13. User-Defined Push Button Schematic Signal Names and Functions

Board Reference

Schematic Signal Name

Cyclone V E FPGA Pin

Number

I/O Standard

S5

USER_PB0

AB12

2.5-V

S6

USER_PB1

AB13

2.5-V

S7

USER_PB2

AF13

2.5-V

S8

USER_PB3

AG12

2.5-V

Table 2–14. User-Defined DIP Switch Schematic Signal Names and Functions

Board Reference

Schematic Signal Name

Cyclone V E FPGA

Pin Number

I/O Standard

1

USER_DIPSW0

Y12

2.5-V

2

USER_DIPSW1

AA13

2.5-V

3

USER_DIPSW2

AF11

2.5-V

4

USER_DIPSW3

AG11

2.5-V

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