Altera Stratix III Development Board User Manual

Page 58

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2–50

Chapter 2: Board Components

On-Board Memory

Stratix III 3SL150 Development Board

May 2013

Altera Corporation

Reference Manual

J19 pin 211

Data write mask (byte enables) bit 5

DDR2_DIMM_DM5

SSTL-18 class I

AK27

J19 pin 223

Data write mask (byte enables) bit 6

DDR2_DIMM_DM6

SSTL-18 class I

AJ28

J19 pin 232

Data write mask (byte enables) bit 7

DDR2_DIMM_DM7

SSTL-18 class I

AP32

J19 pin 164

Data write mask (byte enables) bit 8

DDR2_DIMM_DM8

SSTL-18 class I

AH23

J19 pin 3

Data bit 0

DDR2_DIMM_DQ0

SSTL-18 class I

AP6

J19 pin 4

Data bit 1

DDR2_DIMM_DQ1

SSTL-18 class I

AN7

J19 pin 9

Data bit 2

DDR2_DIMM_DQ2

SSTL-18 class I

AK10

J19 pin 10

Data bit 3

DDR2_DIMM_DQ3

SSTL-18 class I

AK12

J19 pin 122

Data bit 4

DDR2_DIMM_DQ4

SSTL-18 class I

AM7

J19 pin 123

Data bit 5

DDR2_DIMM_DQ5

SSTL-18 class I

AM8

J19 pin 128

Data bit 6

DDR2_DIMM_DQ6

SSTL-18 class I

AM11

J19 pin 129

Data bit 7

DDR2_DIMM_DQ7

SSTL-18 class I

AP8

J19 pin 12

Data bit 8

DDR2_DIMM_DQ8

SSTL-18 class I

AE13

J19 pin 13

Data bit 9

DDR2_DIMM_DQ9

SSTL-18 class I

AF13

J19 pin 21

Data bit 10

DDR2_DIMM_DQ10

SSTL-18 class I

AP11

J19 pin 22

Data bit 11

DDR2_DIMM_DQ11

SSTL-18 class I

AF15

J19 pin 131

Data bit 12

DDR2_DIMM_DQ12

SSTL-18 class I

AE14

J19 pin 132

Data bit 13

DDR2_DIMM_DQ13

SSTL-18 class I

AE15

J19 pin 140

Data bit 14

DDR2_DIMM_DQ14

SSTL-18 class I

AP9

J19 pin 141

Data bit 15

DDR2_DIMM_DQ15

SSTL-18 class I

AN10

J19 pin 24

Data bit 16

DDR2_DIMM_DQ16

SSTL-18 class I

AN12

J19 pin 25

Data bit 17

DDR2_DIMM_DQ17

SSTL-18 class I

AM12

J19 pin 30

Data bit 18

DDR2_DIMM_DQ18

SSTL-18 class I

AG15

J19 pin 31

Data bit 19

DDR2_DIMM_DQ19

SSTL-18 class I

AH15

J19 pin 143

Data bit 20

DDR2_DIMM_DQ20

SSTL-18 class I

AN13

J19 pin 144

Data bit 21

DDR2_DIMM_DQ21

SSTL-18 class I

AP13

J19 pin 149

Data bit 22

DDR2_DIMM_DQ22

SSTL-18 class I

AP14

J19 pin 150

Data bit 23

DDR2_DIMM_DQ23

SSTL-18 class I

AK15

J19 pin 33

Data bit 24

DDR2_DIMM_DQ24

SSTL-18 class I

AJ21

J19 pin 34

Data bit 25

DDR2_DIMM_DQ25

SSTL-18 class I

AM22

J19 pin 39

Data bit 26

DDR2_DIMM_DQ26

SSTL-18 class I

AN21

J19 pin 40

Data bit 27

DDR2_DIMM_DQ27

SSTL-18 class I

AP21

J19 pin 152

Data bit 28

DDR2_DIMM_DQ28

SSTL-18 class I

AJ20

J19 pin 153

Data bit 29

DDR2_DIMM_DQ29

SSTL-18 class I

AK21

J19 pin 158

Data bit 30

DDR2_DIMM_DQ30

SSTL-18 class I

AP20

J19 pin 159

Data bit 31

DDR2_DIMM_DQ31

SSTL-18 class I

AM21

J19 pin 80

Data bit 32

DDR2_DIMM_DQ32

SSTL-18 class I

AE20

J19 pin 81

Data bit 33

DDR2_DIMM_DQ33

SSTL-18 class I

AF21

J19 pin 86

Data bit 34

DDR2_DIMM_DQ34

SSTL-18 class I

AP24

Table 2–45. DDR2 DIMM Interface I/O Signals (Part 2 of 4)

Board Reference

Description

Schematic

Signal Name

I/O Standard

Stratix III

Pin Number

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