Altera Stratix III Development Board - Manual (Page 72)

2–64 Chapter 2: Board Components
On-Board Memory
Stratix III 3SL150 Development Board May 2013 Altera Corporation
Reference Manual
U9 pin B5
Address bus shared with
flash and P-SRAM bit 13
FSM_A13 1.8 V A33
U5 pin T12 and U4 pin G3 and
U10 pin G3 and U5 pin T12
U9 pin C5
Address bus shared with
flash and P-SRAM bit 14
FSM_A14 1.8 V B31
U5 pin M11 and U4 pin G4 and
U10 pin G4 and U5 pin M11
U9 pin D7
Address bus shared with
flash and P-SRAM bit 15
FSM_A15 1.8 V A31
U5 pin R12 and U4 pin F3 and
U10 pin F3 and U5 pin R12
U9 pin D8
Address bus shared with
flash and P-SRAM bit 16
FSM_A16 1.8 V B32
U5 pin N11 and U4 pin F4 and
U10 pin F4 and U5 pin N11
U9 pin A7
Address bus shared with
flash and P-SRAM bit 17
FSM_A17 1.8 V A32
U5 pin T13 and U4 pin E4 and U10
pin E4 and U5 pin T13
U9 pin B7
Address bus shared with
flash and P-SRAM bit 18
FSM_A18 1.8 V M23
U5 pin P11 and U4 pin D3 and
U10 pin D3 and U5 pin P11
U9 pin C7
Address bus shared with
flash and P-SRAM bit 19
FSM_A19 1.8 V L23
U5 pin R13 and U4 pin H1 and
U10 pin H1 and U5 pin R13
U9 pin C8
Address bus shared with
flash and P-SRAM bit 20
FSM_A20 1.8 V B29
U5 pin M1 and U4 pin G2 and U10
pin G2 and U5 pin M1
U9 pin A8
Address bus shared with
flash and P-SRAM bit 21
FSM_A21 1.8 V C29
U5 pin R14 and U4 pin H6 and
U10 pin H6 and U5 pin R14
U9 pin G1
Address bus shared with
flash and P-SRAM bit 22
FSM_A22 1.8 V C31 U5 pin N12
U9 pin H8
Address bus shared with
flash and P-SRAM bit 23
FSM_A23 1.8 V D31 U5 pin T15
U9 pin B6
Address bus shared with
flash and P-SRAM bit 24
FSM_A24 1.8 V F27 U5 pin P12
U9 pin F2
Data bus shared with
flash and P-SRAM bit 0
FSM_D0 1.8 V G27 U5 pin P4 and U4 pin B6
U9 pin E2
Data bus shared with
flash and P-SRAM bit 1
FSM_D1 1.8 V F28 U5 pin R1 and U4 pin C5
U9 pin G3
Data bus shared with
flash and P-SRAM bit 2
FSM_D2 1.8 V E28 U5 pin P5 and U4 pin C6
U9 pin E4
Data bus shared with
flash and P-SRAM bit 3
FSM_D3 1.8 V D30 U5 pin T2 and U4 pin D5
U9 pin E5
Data bus shared with
flash and P-SRAM bit 4
FSM_D4 1.8 V C30 U5 pin N5 and U4 pin E5
U9 pin G5
Data bus shared with
flash and P-SRAM bit 5
FSM_D5 1.8 V F29 U5 pin R3 and U4 pin F5
U9 pin G6
Data bus shared with
flash and P-SRAM bit 6
FSM_D6 1.8 V E29 U5 pin P6 and U4 pin F6
U9 pin H7
Data bus shared with
flash and P-SRAM bit 7
FSM_D7 1.8 V J24 U5 pin R4 and U4 pin G6
U9 pin E1
Data bus shared with
flash and P-SRAM bit 8
FSM_D8 1.8 V J25 U5 pin N6 and U4 pin B1
U9 pin E3
Data bus shared with
flash and P-SRAM bit 9
FSM_D9 1.8 V A24 U5 pin T4 and U4 pin C1
Table 2–55. Flash Interface I/O (Part 2 of 3)
Board
Reference
Description
Schematic Signal
Name
I/O
Standard
Stratix III
Pin
Number
Other Connections