Freescale Semiconductor MC68HC908MR32 - Manual (Page 102)

Input/Output (I/O) Ports (PORTS)
MC68HC908MR32 • MC68HC908MR16 Data Sheet, Rev. 6.1
102 Freescale Semiconductor
$0005
Data Direction Register B
(DDRB)
See page 105.
Read:
DDRB7 DDRB6 DDRB5 DDRB4 DDRB3 DDRB2 DDRB1 DDRB0
Write:
Reset: 0 0 0 0 0 0 0 0
$0006
Data Direction Register C
(DDRC)
See page 106.
Read: 0
DDRC6 DDRC5 DDRC4 DDRC3 DDRC2 DDRC1 DDRC0
Write: R
Reset: 0 0 0 0 0 0 0 0
$0007 Unimplemented
$0008
Port E Data Register
(PTE)
See page 108.
Read:
PTE7 PTE6 PTE5 PTE4 PTE3 PTE2 PTE1 PTE0
Write:
Reset: Unaffected by reset
$0009
Port F Data Register
(PTF)
See page 110.
Read: 0 0
PTF5 PTF4 PTF3 PTF2 PTF1 PTF0
Write: R R
Reset: Unaffected by reset
$000A Unimplemented
$000B Unimplemented
$000C
Data Direction Register E
(DDRE)
See page 109.
Read:
DDRE7 DDRE6 DDRE5 DDRE4 DDRE3 DDRE2 DDRE1 DDRE0
Write:
Reset: 0 0 0 0 0 0 0 0
$000D
Data Direction Register F
(DDRF)
See page 110.
Read: 0 0
DDRF5 DDRF4 DDRF3 DDRF2 DDRF1 DDRF0
Write: R R
Reset: 0 0 0 0 0 0
Addr. Register Name Bit 7 6 5 4 3 2 1 Bit 0
R = Reserved = Unimplemented
Figure 10-1. I/O Port Register Summary (Continued)