Freescale Semiconductor MC68HC908MR32 - Manual (Page 35)

Memory Map
MC68HC908MR32 • MC68HC908MR16 Data Sheet, Rev. 6.1
Freescale Semiconductor 35
$FE00
SIM Break Status Register
(SBSR)
See page 191.
Read:
R R R R R R BW R
Write:
Reset: 0
$FE01
SIM Reset Status Register
(SRSR)
See page 192.
Read: POR PIN COP ILOP ILAD MENRST LVI 0
Write: R R R R R R R R
Reset: 1 0 0 0 0 0 0 0
$FE03
SIM Break Flag Control
Register (SBFCR)
See page 193.
Read:
BCFE R R R R R R R
Write:
Reset: 0
$FE08
FLASH Control Register
(FLCR)
See page 38.
Read: 0 0 0 0
HVEN MASS ERASE PGM
Write:
Reset: 0 0 0 0 0 0 0 0
$FE0C
Break Address Register High
(BRKH)
See page 254.
Read:
Bit 15 14 13 12 11 10 9 Bit 8
Write:
Reset: 0 0 0 0 0 0 0 0
$FE0D
Break Address Register Low
(BRKL)
See page 254.
Read:
Bit 7 6 5 4 3 2 1 Bit 0
Write:
Reset: 0 0 0 0 0 0 0 0
$FE0E
Break Status and Control
Register (BRKSCR)
See page 254.
Read:
BRKE BRKA
0 0 0 0 0 0
Write:
Reset: 0 0 0 0 0 0 0 0
$FE0F
LVI Status and Control Register
(LVISCR)
See page 99.
Read: LVIOUT 0
TRPSEL
0 0 0 0 0
Write: R R R R R R R
Reset: 0 0 0 0 0 0 0 0
$FF7E
FLASH Block Protect Register
(FLBPR)
See page 43.
Read:
BPR7 BPR6 BPR5 BPR4 BPR3 BPR2 BPR1 BPR0
Write:
Reset: 0 0 0 0 0 0 0 0
$FFFF
COP Control Register
(COPCTL)
See page 77.
Read: Low byte of reset vector
Write: Clear COP counter
Reset: Unaffected by reset
Addr. Register Name Bit 7 6 5 4 3 2 1 Bit 0
U = Unaffected X = Indeterminate R = Reserved Bold = Buffered = Unimplemented
Figure 2-2. Control, Status, and Data Registers Summary (Sheet 8 of 8)