Freescale Semiconductor MC68HC908MR32 - Manual (Page 273)

CGM Acquisition/Lock Time Specifications
MC68HC908MR32 • MC68HC908MR16 Data Sheet, Rev. 6.1
Freescale Semiconductor 273
19.12 CGM Acquisition/Lock Time Specifications
Description Symbol Min Typ Max Notes
Filter capacitor multiply factor C
FACT
— 0.0154 — F/sV
Acquisition mode time factor K
ACQ
— 0.1135 — V
Tracking mode time factor K
TRK
— 0.0174 — V
Manual mode time to stable t
ACQ
—
(8*V
DDA
)/
(f
XCLK
*K
ACQ)
—
If C
F
chosen
correctly
Manual stable to lock time t
AL
—
(4*V
DDA
)/
(f
XCLK
*K
TRK
)
—
If C
F
chosen
correctly
Manual acquisition time t
Lock
— t
ACQ
+t
AL
—
Tracking mode entry frequency
tolerance
∆
TRK
0 — ± 3.6%
Acquisition mode entry frequency
tolerance
∆
ACQ
±
6.3% — ± 7.2%
Lock entry frequency tolerance
∆
Lock
0 — ± 0.9%
Lock exit frequency tolerance
∆
UNL
±
0.9% — ± 1.8%
Reference cycles per acquisition mode
measurement
n
ACQ
— 32 —
Reference cycles per tracking mode
measurement
n
TRK
— 128 —
Automatic mode time to stable t
ACQ
n
ACQ
/f
XCLK
(8*V
DDA
)/
(f
XCLK
*K
ACQ)
—
If C
F
chosen
correctly
Automatic stable to lock time t
AL
n
TRK
/f
XCLK
(4*V
DDA
)/
(f
XCLK
*K
TRK
)
—
If C
F
chosen
correctly
Automatic lock time t
Lock
— t
ACQ
+t
AL
—
PLL jitter (deviation of average bus
frequency over 2 ms)
f
J
0 —
± (f
XCLK
)
*(0.025%)
*(N/4)
N = VCO
freq. mult.