Freescale Semiconductor MC68HC908MR32 - Manual (Page 42)

Memory
MC68HC908MR32 • MC68HC908MR16 Data Sheet, Rev. 6.1
42 Freescale Semiconductor
Figure 2-4. FLASH Programming Flowchart
SET HVEN BIT
READ THE FLASH BLOCK PROTECT REGISTER
WRITE ANY DATA TO ANY FLASH ADDRESS
WITHIN THE ROW ADDRESS RANGE DESIRED
WAIT FOR A TIME, t
NVS
SET PGM BIT
WAIT FOR A TIME, t
PGS
WRITE DATA TO THE FLASH ADDRESS
TO BE PROGRAMMED
WAIT FOR A TIME, t
PROG
CLEAR PGM BIT
WAIT FOR A TIME, t
NVH
CLEAR HVEN BIT
WAIT FOR A TIME, t
RCV
COMPLETED
PROGRAMMING
THIS ROW?
YES
NO
END OF PROGRAMMING
The time between each FLASH address change (step 7 to step 7), or
must not exceed the maximum programming
time, t
PROG
max.
the time between the last FLASH address programmed
to clearing PGM bit (step 7 to step 10)
Note:
1
2
3
4
5
6
7
8
10
11
12
13
ALGORITHM FOR PROGRAMMING
A ROW (64 BYTES) OF FLASH MEMORY
This row program algorithm assumes the row/s
to be programmed are initially erased.