7 receive oversized frames register (rxoversized), 8 receive jabber frames register (rxjabber), 10 receive frame fragments register (rxfragments) – Texas Instruments TMS320C645x DSP User Manual

Page 138: Section 5.50.7, Section 5.50.8, Section 5.50.9, Section 5.50.10

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5.50.7

Receive Oversized Frames Register (RXOVERSIZED)

5.50.8

Receive Jabber Frames Register (RXJABBER)

5.50.9

Receive Undersized Frames Register (RXUNDERSIZED)

5.50.10 Receive Frame Fragments Register (RXFRAGMENTS)

EMAC Port Registers

The total number of oversized frames received on the EMAC. An oversized frame is defined as having all
of the following:

Was any data or MAC control frame that matched a unicast, broadcast, or multicast address, or
matched due to promiscuous mode

Was greater than RXMAXLEN in bytes

Had no CRC error, alignment error, or code error

See

Section 2.5.5

for definitions of alignment, code/CRC errors. Overruns have no effect on this statistic.

The total number of jabber frames received on the EMAC. A jabber frame is defined as having all of the
following:

Was any data or MAC control frame that matched a unicast, broadcast, or multicast address, or
matched due to promiscuous mode

Was greater than RXMAXLEN bytes long

Had a CRC error, alignment error, or code error

See

Section 2.5.5

for definitions of alignment, code, and CRC errors. Overruns have no effect on this

statistic.

The total number of undersized frames received on the EMAC. An undersized frame is defined as having
all of the following:

Was any data frame that matched a unicast, broadcast, or multicast address, or matched due to
promiscuous mode

Was less than 64 bytes long

Had no CRC error, alignment error, or code error

See

Section 2.5.5

for definitions of alignment, code, and CRC errors. Overruns have no effect on this

statistic.

The total number of frame fragments received on the EMAC. A frame fragment is defined as having all of
the following:

Any data frame (address matching does not matter)

Was less than 64 bytes long

Had a CRC error, alignment error, or code error

Was not the result of a collision caused by half duplex, collision based flow control

See

Section 2.5.5

for definitions of alignment, code, and CRC errors. Overruns have no effect on this

statistic.

Ethernet Media Access Controller (EMAC)/Management Data Input/Output (MDIO)

138

SPRU975B – August 2006

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