Texas Instruments TMS320C645x DSP - Manual (Page 16)

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2.3 System Level Connections
2.3.1 Media Independent Interface (MII) Connections
MTCLK
MTXD[3−0]
MTXEN
MCOL
MCRS
MRCLK
MRXD[3−0]
MRXDV
MRXER
MDCLK
MDIO
Physical
layer
device
(PHY)
System
core
Transformer
2.5 MHz
or
25 MHz
RJ−45
EMAC
MDIO
EMAC Functional Architecture
The C645x device supports four different interfaces to a physical layer device. You can only transfer data
on one interface at a given time. Each of these interfaces is selected in hardware via the configuration
pins (MACSEL[1:0]).
Table 1 shows the possible settings for these configuration pins.
Table 1. Interface Selection Pins
MACSEL [1:0] Interface
00 MII
01 RMII
10 GMII
11 RGMII
Figure 2 shows a device with integrated EMAC and MDIO interfaced via a MII connection. This interface is
only available in 10 Mbps and 100 Mbps modes.
Figure 2. Ethernet Configuration with MII Interface
16 Ethernet Media Access Controller (EMAC)/Management Data Input/Output (MDIO) SPRU975B – August 2006
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