Texas Instruments TMS320C645x DSP - Manual (Page 89)

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5.6 Receive Control Register (RXCONTROL)
EMAC Port Registers
The receive control register (RXCONTROL) is shown in Figure 34 and described in Table 34 .
Figure 34. Receive Control Register (RXCONTROL)
31 16
Reserved
R-0
15 1 0
Reserved RXEN
R-0 R/W-0
LEGEND: R/W = Read/Write; R = Read only; -n = value after reset
Table 34. Receive Control Register (RXCONTROL) Field Descriptions
Bit Field Value Description
31-1 Reserved 0 Reserved
0 RXEN Receive DMA enable
0 Receive is disabled
1 Receive is enabled
SPRU975B – August 2006 Ethernet Media Access Controller (EMAC)/Management Data Input/Output (MDIO) 89
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