Clear-Com HX System Frames - Manual (Page 75)

8. The Assign New Configuration File dialog asks you to select the code for the first device in
the chain or to bypass that device.
In this example procedure, the first device will be bypassed and either the U1 CPLD or FPGA
code will be assigned to the second device.
• For the first device, press Bypass.
• For the second device, select the appropriate code file (either the U1 CPLD code or
FPGA code file). The U1 CPLD and FPGA code files are available from the hardware
DVD:
• Hardware DVD > Eclipse HX-PiCo > xxxxxxZ – E32 Glue Logic CPLD
(U1).
• Hardware DVD > PiCo and HX-PiCo > xxxxxxZ – Eclipse 32 FPGA Code.
Reminder:
If you are upgrading the FPGA code, the 14way IDC header must be connected to CON12.
If you are upgrading the U1 CPLD code, the 14way IDC header must be connected to
CON25. See Step 3.
9. A summary dialog is presented. For all devices, ensure that the Erase Before Programming
and Verify flags are set. Click OK.
Figure 43: Example Xilinx device programming properties
10. Right click the second device and select Programming.
The upgrade starts, and takes approximately 2 minutes to complete. When the upgrade is
complete, the Program Succeeded message is displayed in the main window.
11. Power down the matrix.
68 Eclipse HX Upgrade Guide