Cirrus Logic CS4970x4 - Manual (Page 10)

x Copyright 2013 Cirrus Logic, Inc. DS810UM6
CS4953x4/CS4970x4 System Designer’s Guide
Figure 8-19. Displaying CDM Window .......................................................................................................8-25
Figure 8-20. DSP Response after Successful Master Boot .......................................................................8-27
Figure 8-21. Changing Concurrency Modes ..............................................................................................8-28
Figure 9-1. DSP Condenser Wizard Menu Items .........................................................................................9-1
Figure 9-2. Flash Image Build Log ...............................................................................................................9-1
Figure 9-3. Program Flash on Board ............................................................................................................9-2
Figure 9-4. Run Runtime GUI .......................................................................................................................9-2
Figure 9-5. DSP API Manager Input Source ................................................................................................9-2
Figure 9-6. Command Line Launch of DSP Condenser without Image .......................................................9-3
Figure 9-7. DSP Condenser Runtime with DSP Image XML Provided ........................................................9-4
Figure 9-8. Connection Group ......................................................................................................................9-4
Figure 9-9. Command Group .......................................................................................................................9-5
Figure 9-10. DSP Status Group ...................................................................................................................9-6
Figure 9-11. DSP Condenser Runtime Source Selection Group .................................................................9-7
Figure 9-12. DSP Condenser Runtime Source Status Group ......................................................................9-7
Figure 9-13. DSP Manager API Group with Image Information ...................................................................9-9
Figure 9-14. DSP Manager API Group without Image Information ..............................................................9-9
Figure A-1. Out-of-Date DSP Composer Notice .......................................................................................... A-2
Tables
Table P-1. Core Supply Pins ....................................................................................................................... P-7
Table P-2. I/O Supply Pins .......................................................................................................................... P-7
Table P-3. Core and I/O Ground Pins ......................................................................................................... P-8
Table P-4. PLL Supply Pins ........................................................................................................................ P-8
Table P-5. PLL Filter Pins ........................................................................................................................... P-9
Table P-6. Reference PLL Component Values ........................................................................................... P-9
Table P-7. DSP Core Clock Pins ............................................................................................................... P-10
Table P-8. Reset Pin ................................................................................................................................. P-11
Table P-9. Hardware Strap Pins ................................................................................................................ P-11
Table P-10. CS4970x4 Pin Assignments for 144-Pin and 128-Pin Packages ......................................... P-12
Table P-11. CS4953x4 Pin Assignments for 144-Pin and 128-Pin Packages ......................................... P-19
Table 1-1. Operation Modes .........................................................................................................................1-2
Table 1-2. Supported SPI Flash Read Format .............................................................................................1-3
Table 1-3. Boot Read Messages from CS4953x4/CS4970x4 ......................................................................1-8
Table 2-1. Serial Control Port SPI Signals ...................................................................................................2-2
Table 2-2. Serial Control Port 1 I2C Signals ..............................................................................................2-10
Table 3-1. Digital Audio Input Port ...............................................................................................................3-1