Table 2-1. serial control port spi signals -2 – Cirrus Logic CS4970x4 User Manual
Page 48
SPI Port
CS4953x4/CS4970x4 System Designer’s Guide
DS810UM6
Copyright 2013 Cirrus Logic, Inc
2-2
device on the bus may respond to one or more unique commands, and can operate as either a transmitter
or receiver.
A device is considered the Master in a transaction if it drives the CS pin of another device, and is also
Mastering the SCP1_CLK line. A block diagram of the CS4953x4/CS4970x4 and CS4953x4/CS4970x4
SPI Serial Control Port is provided in
.
Figure 2-1. SPI Serial Control Port Internal Block Diagram
shows the signal names, descriptions, and pin number of the signals associated with the SPI
Serial Control Port on the CS4953x4/CS4970x4.
Table 2-1. Serial Control Port SPI Signals
Pin Name
Pin Description
LQFP-144
Pin #
LQFP-128
Pin #
Pin Type
SCP1_CS
SPI Chip Select, Active Low
In serial SPI Slave mode, this pin is used as the active-low chip-select input
signal. In SPI serial Master mode, if this pin is driven low by another Master
device on the bus, it will cause a mode fault to occur.
96
6
Input
SCP1_CLK
SPI Control Port Bit Clock
In Master mode, this pin serves as the serial control clock output. In serial Slave
mode, this pin serves as the serial control clock input.
99
126
I/O
SCP1_MOSI
SPI Mode Master Data Output/Slave Data Input
SCP1_MOSI in SPI Slave mode this pin serves an the data input, in SPI Master
mode this pin serves as the data output.
95
3
I/O
SCP1_MISO
SPI Mode Master Data Input/Slave Data Output
In SPI Slave mode this pin serves as the data input. In SPI Master mode this pin
serves as the data output.
97
2
I/O
SCP1_IRQ
Serial Control Port Data Ready Interrupt Request Output, Active Low
This pin is driven low when the DSP has a message for the host to read. The pin
will go high when the host has read the message and the DSP has no further
messages. This pin reflects the state of the SCP1 port Transmit Buffer Empty
Flag.
100
4
Open
Drain
SCP1_BSY
Serial Control Port 1 Input Busy, Output, Active Low
This pin is driven low when the control port’s receive buffer is full. This pin
reflects the state of the SCP1 or PCP Receive Buffer Full Fag.
102
128
Open
Drain
SCP2_CS
SPI Chip Select, Active Low
In serial SPI Slave mode, this pin is used as the active-low chip-select input
signal. In SPI serial Master mode, if this pin is driven low by another Master
device on the bus, it will cause a mode fault to occur.
104
7
Input