C.1.2.1 loading dts-es decoder in matrix mode, C.1.3 dolby digital, C.1.3.2 setting dolby digital to ac3 drc mode – Cirrus Logic CS4970x4 User Manual

Page 155: C.1.4 cirrus logic signal generator (sgen), C.1.4.1 loading the cirrus logic sgen module

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C-2

Copyright 2013 Cirrus Logic, Inc.

DS810UM6

Introduction
CS4953x4/CS4970x4 System Designer’s Guide

C.1.2.1 Loading DTS-ES Decoder in Matrix Mode

The host commands necessary to load DTS-ES in matrix mode are:

UCMD Ef00000000000100

UCMD Ef000007000x00yy

UCMD Ef000008000000zz #Loads DTS Neo6 required to load DTS ES Matrix

UCMD Ef00000000000001

X= DTS_ES decoder mode with matrix ON, yy= dts_es uld id, zz = neo 6 uld id

C.1.3 Dolby Digital

®

See the Cirrus Logic application note, AN246DA for a complete description of the Dolby Digital firmware
module.

C.1.3.1 Loading Dolby Digital Decoder for Stereo Output

The host commands necessary to load Dolby Digital for stereo output are

UCMD Ef00000000000100

UCMD Ef000007000x00yy

UCMD Ef00000B0000000z # Change PPM mode (Output mode)

UCMD Ef00000000000001

x = DD mode for stereo output (e.g., LoRo).
yy = ac3 decoder uld id
z = ppm mode with output mode L_R

C.1.3.2 Setting Dolby Digital to AC3 DRC Mode

The host commands necessary to load Dolby Digital Dynamic Range Compression (DRC) modes are

UCMD Ef00000000000100

UCMD Ef000007000x00yy

UCMD Ef00000000000001

x = AC3 DRC mode desired (as per flash_image.xml file), yy= AC3 uld id

C.1.4 Cirrus Logic Signal Generator (SGEN)

See the Cirrus Logic application note, AN246DH for a complete description of the SGEN firmware
module.

C.1.4.1 Loading the Cirrus Logic SGEN Module

To load SGEN, follow these steps:

1.

Change the input source to either “SPDIF with no autodetect” or “HDMI with no autodetect”.

2. Change input source to SPDIF with no autodetect and load SGEN .uld using the following host

commands:

UCMD Ef00000000000100

UCMD Ef00000600000005 # Selects

SPDIF with no autodetect.

UCMD Ef000007000x00yy # Host command that loads SGEN

UCMD Ef00001300000100 # Sets DSP_CFG_MCLK_FACTOR.

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