Figure 2-10. i2c address with ack and nack -12 – Cirrus Logic CS4970x4 User Manual
Page 58
I2C Port
CS4953x4/CS4970x4 System Designer’s Guide
DS810UM6
Copyright 2013 Cirrus Logic, Inc
2-12
the CS4953x4/CS4970x4 is 1000000b (0x80). The R/W bit is used to notify the Slave if the current
transaction is for the Master to write data to the Slave (R/W = 0) or read data from the Slave (R/W = 1).
After the Master has sent the address byte, the Master releases the SCP1_SDA line. If the Slave received
the address byte, it will drive the SCP1_SDA line low to acknowledge (ACK) to the Master that the byte
was received. The SCP1_SDA line must remain stable and low during the high period of the next clock
pulse. When a Slave doesn’t acknowledge the Slave address, the data line must be left high by the Slave
(NACK).
Figure 2-10. I
2
C Address with ACK and NACK
For write operations, the R/W bit must be set to zero (R/W = 0, Address = 0x80). After the 8-bit data byte
has been clocked, the Master will release the SCP1_SDA line. If the Slave received the byte correctly, it
will drive the SCP1_SDA line low for the next bit clock to acknowledge (ACK) that the data was received.
If the data was not received correctly, the Slave can communicate this by leaving the SCP1_SDA line high
(NACK).
For read operations, the R/W bit must be set to one (R/W = 1, Address = 0x81), then the Master will read
a data byte from the Slave. After the 8-bit data byte has been clocked, the Master will release the
SCP1_SDA line. If the Master received the byte correctly, it will drive the SCP1_SDA line low for the next
bit clock to acknowledge (ACK) that the data was received. If the data was not received correctly, the
Master can communicate this by leaving the SCP1_SDA line high (NACK). The protocol on the last byte,
however, is different. When the Master receives the last byte, it signals the end of the data to the Slave by
allowing SCP1_SDA to float high (NACK).
Start
SCP1_CLK
SCP1_SDA
A[6]
A[5]
A[4]
A[3]
A[2]
A[1]
A[0]
R/W
ACK
M
S
Start
SCP1_CLK
SCP1_SDA
A[6]
A[5]
A[4]
A[3]
A[2]
A[1]
A[0]
R/W
NACK
M
S
M = Master Drives SDA
S = Slave Drives SDA