Cirrus Logic CS4970x4 - Manual (Page 47)

Introduction
CS4953x4/CS4970x4 System Designer’s Guide
DS810UM6 Copyright 2013 Cirrus Logic, Inc 2-1
Chapter 2
Serial Communication Mode
2.1 Introduction
The CS4953x4/CS4970x4 uses the Serial Control Port (SCP) to communicate with external devices such
as host microprocessors using either I
2
C or SPI serial communication formats.
2.2 Communication Using the Serial Control Port
The SCP1 Port is configured as a Slave and the SCP2 Port is configured as a Master. The CS4953x4/
CS4970x4 DSP serial ports communicate using the SCP_CLK, SCP_MOSI, and SCP_MISO (SPI serial
Master and Slave modes), and SCP_SDA (for I
2
C serial Master and Slave modes) pins.
In both SPI and I
2
C modes, the serial control port performs 8-bit transfers. The SCP1 Port can request a
read from the host by activating the SCP1_IRQ pin. The port can also indicate that the host should stop
sending data by activating the SCP1_BSY pin.
It is mandatory for the host to obey the SCP1_BSY pin status. Messages sent to the DSPs host control
port (SCP1) when SCP1_BSY pin is low will be lost.
The CS4953x4/CS4970x4 SPI and I
2
C serial communication modes are identical from a functional
standpoint. The main difference between the two is the actual protocol being implemented between the
CS4953x4/CS4970x4 and the host.
The CS4953x4/CS4970x4 has two serial ports.The O/S currently supports only Slave mode host
communication on SCP1, and Master mode communication on SCP2 for booting from a SPI Flash.
2.3 Serial Control Port Configuration
The serial control port configuration for an operating mode is determined by register settings in DSP
Condenser. Refer to
Chapter 8, "DSP Condenser" for more details. The CS4953x4/CS4970x4 OS
currently supports two serial control port configurations for host control:
• SPI Slave (Write Address = 0x80, Read Address = 0x81). See. Section 2.4.
• I
2
C Slave (Write Address = 0x80, Read Address = 0x81) (Contact your Cirrus FAE or
representatives for complete details about this implementing this interface.)
Procedures for configuring the serial control port for SPI and I
2
C communication modes are provided in
this chapter.
2.4 SPI Port
The CS4953x4/CS4970x4 Serial Peripheral Interface (SPI) bus has been developed for 8-bit digital
control applications, such as those requiring microcontrollers. SPI communication is accomplished with 5
lines: Serial Chip Select (SCP1_CS), Serial Control Clock (SCP1_CLK), Master Out/Slave In data
(SCP1_MOSI), and a Master In/Slave Out data (SCP1_MISO). Although the separate data I/O lines
provide full-duplex capabilities, the CS4953x4/CS4970x4 chips only uses a half-duplex SPI-bus. Each