Cirrus Logic CS4970x4 - Manual (Page 148)

9-9 Copyright 2013 Cirrus Logic, Inc. DS810UM6
Runtime GUI Current Project
CS4953x4/CS4970x4 System Designer’s Guide
Figure 9-13. DSP Manager API Group without Image Information
9.2.7.1 Source
The source shows the value of the DSP_CFG_AUDIO_SRC Register. The possible options are
determined by the flash image information. The values can be “SPDIF”, “SPDIF_NO_AUTOSWITCH”,
“HDMI”, “HDMI_NO_AUTOSWITCH”, and “MULTICHANNEL”.
9.2.7.2 MCLK Factor
The MCLK Factor shows the value of the DSP_CFG_MCLK_FACTOR Register. The possible options are
determined by the flash image information. Some of the possible values are “128Fs”, “256 Fs”, and “512
Fs”.
9.2.7.3 Output Fs
The Output Fs reflects the value of the DSP_CFG_OUTPUT_FS Register. The possible options are: "48
KHz", "44.1 KHz", "32 KHz", "96 KHz", "88.2 KHz", "64 KHz", "24 KHz", "22.05 KHz", "16 KHz", "192
KHz", "176.4 KHz", and "128 KHz".
9.2.7.4 Decoder and Decoder Mode
The Decoder and Decoder Mode reflect the value of the DSP_CFG_DECODER Register.
9.2.7.5 MPM and MPM Mode
The MPM and MPM Mode reflect the value of the DSP_CFG_MATRIX Register.
9.2.7.6 VPM and VPM Mode
The VPM and VPM Mode reflect the value of the DSP_CFG_VIRTUALIZER Register.