Appendix a faq, A.1 introduction, A.2 list of questions and answers – Cirrus Logic CS4970x4 User Manual

Page 150: Appendix a faq a.1 introduction

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Introduction

CS4953x4/CS4970x4 System Designer’s Guide

DS810UM6

Copyright 2013 Cirrus Logic, Inc

A-1

Appendix A

FAQ

A.1 Introduction

Appendix A contains design tips in the familiar Question and Answer format. The issues discussed are
workarounds and techniques perfected by Cirrus Logic internal designers and support staff to smooth the
path of DSP system designers.

A.2 List of Questions and Answers

Q 1. I would like to create a custom flash image. How does one edit the Flash_image.xml file?

A 1. View the sample flash_image.xml and follow the instructions in the sample file.

After the necessary tools and deliverables have been installed on the user’s system, do the following:

1.

Extract the sample_cirrus.zip file to “C:\CirrusDSP\DSPCondenser\projects\sample_cirrus”
folder.

2.

Verify that “C:\CirrusDSP\DSPCondenser\projects\sample_cirrus\flash_image.xml” folder
exists.

For users that are not familiar with XML coding, here are some basic syntax protocols used in the sample
flash_image.xml.

<source> </source> are start/end markers for an input source.

</concurrency_mode> end marker for a particular concurrency mode which defines all modules
(and their configurations) loaded when a particular stream type is identified.

<stream type< </stream type> are start/end markers for a stream type to associate a particular
stream type with the corresponding decoder

<concurrency_modes> </concurrency_modes> start/end marker to the section that lists all
concurrency modes.

<sample_rate_combinations> </sample_rate_combinations> This section configures the DSP
output xclocks for all possible sample rates. Do NOT edit this section. Please contact Cirrus Logic
for any issues regarding this section.

<power_up_state> </power_up_state> are the start/end markers of the section that defines the
default DSP state immediately after master boot.

</mode> mode end/separation marker. Use this marker to separate types of modes.

See

Section 7.3.6 “Unsolicited Messages from DSP to the Host Microcontroller” on page 7-4

and

Section 7.4.2 “DSP_CFG_xxx Registers” on page 7-7

</uld> current uld end marker or uld separation marker in the uld list.

</ulds> end of uld list

See

Section 7.3.6 “Unsolicited Messages from DSP to the Host Microcontroller” on page 7-4

and

Section

7.4.2 “DSP_CFG_xxx Registers” on page 7-7

See Step 7 in

Section 8.7.2 “Creating a Serial Flash Image Manually” on page 8-22

for the circumstances

when the .xml files are edited.

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