Plc-2, Family processors ladder logic – Rockwell Automation 1771-DB BASIC MODULE User Manual
Page 82

Chapter
Programming Block-Transfers
5
5 -8
The Mini-PLC-2 (cat. no. 1772-LN3) and PLC 2/20 (cat. no. 1772-LP1,
-LP2) processors use multiple GET instructions to perform block-transfers.
Refer to the processor user’s manual for an explanation of multiple GET
block-transfers.
The first two rungs of the sample program toggle the requests for
block-transfer-writes (BTW) and block-transfer-reads (BTR).
The interlocks shown do not allow a BTR and BTW instruction to enable
at the same time.
In Rung 3 when a BTR is successfully completed, its done bit sets,
enabling the file-to-file move instruction. The file-to-file move instruction
(FFM) moves the BTR data file (File 205–209) into a storage data file
(210–214). This prevents the programmable controller from using invalid
data if a block-transfer communication fault occurs.
Important: Use the first available timer-counter as a data address.
Important: The PLC-2 is in 2-slot chassis addressing.
FILE TO FILE MOVE
COUNTER ADDR:
POSITION:
FILE LENGTH:
0052
001
005
0205 – 0209
0210 – 0214
005
FILE A:
FILE R:
RATE PER SCAN
110
16
010
17
BLOCK XFER WRITE
DATA ADDR:
MODULE ADDR:
BLOCK LENGTH:
FILE:
0030
101
05
0200 – 0204
010
16
110
16
LADDER DIAGRAM DUMP
START
BLOCK XFER READ
DATA ADDR:
MODULE ADDR:
BLOCK LENGTH:
FILE:
0031
101
05
0205 – 0209
010
17
110
17
110
17
010
16
110
17
0052
17
0052
15
1
2
3
END 01295
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(EN)
(DN)
(EN)
(DN)
(DN)
(EN)
PLC-2
Family Processors
Ladder Logic