ProSoft Technology MVI56E-SIE - Manual (Page 44)

Configuring the MVI56E-SIE Module MVI56E-SIE ♦ ControlLogix Platform
User Manual Client Communication Module
Page 44 of 168 ProSoft Technology, Inc.
September 6, 2012
2.2.3 Module
This section of the configuration describes the database setup and module-level
parameters.
Backplane Error/Status Pointer
1 to 4955
This parameter sets the address in the internal database where the backplane
error/status data will be placed. If you want the error/status data to be moved to
the processor and placed into the ReadData array, the value entered should be a
module memory address in the Read Data area. If the value is set to -1, the
error/status data will not be stored in the module's internal database and will not
be transferred to the processor's ReadData array.
Enabling the Error/Status Pointer is optional. The error/status data is routinely
returned as part of the input image, which is continually being transferred from
the module to the processor. For more information, see Normal Data Transfer
Blocks (page 138).
Read Register Start
0 to 4999
This parameter specifies the start of the Read Data area in module memory.
Data in this area will be transferred from the module to the processor.
Note: Total user database memory space is limited to the first 5000 registers of
module memory, addresses 0 through 4999. Therefore, the practical limit for this
parameter is 4999 minus the value entered for Read Register Count, so that the
Read Data Area does not try to extend above address 4999. Read Data and
Write Data Areas must be configured to occupy separate address ranges in
module memory and should not be allowed to overlap.
Read Register Count
0 to 5000
This parameter specifies the size of the Read Data area of module memory and
the number of registers to transfer from this area to the processor, up to a
maximum of 5000 words.
Note: Total Read Register Count and Write Register Count cannot exceed 5000
total registers. Read Data and Write Data Areas must be configured to occupy
separate address ranges in module memory and should not be allowed to
overlap.