Rs t, Main boar d, Control bo a rd – Hitachi SJ700-2 Series User Manual

Page 55: Pkd pd, Ff 1 ff 2

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background image

P

N

CB circ

ui

t

R

S

T

PKD

PD

SCRG

N

RB

BRDG

NN

XG

YG

ZG

UE

VE

WE

UG

VG

WG

P

U

W

OH1

TH

F

THP

THC

OM

FF

1

FF

2

Inst. p

ow

er

failure

d

et

ec

t

Opt

coup

ler

Phase fail

d

et

ec

t

Opt

coup

ler

Opt

coup

ler

Opt

coup

ler

RP

HF

RP

HF

RP

HF

IPL

(N

)

Inrush cur

re

nt

limit circ

uit

Thyristo

r d

riv

e

cir

cu

it

(incl. suppress ci

rc

uit

)

Power sup

ply

for THY ga

te

(5

V)

Opt

coup

ler

SCR

BRD drive c

irc

uit

(suppress cir

cu

it)

Opt

coup

ler

BRD

(N

)

(L

)

Lower arm dri

ve

ci

rc

uit

(suppress cir

cu

it)

Power sup

ply

for IGBT lower a

rm

s

(PV15

)

ST

R

(N

)

Upper arm driv

e

cir

cu

it

(suppress cir

cu

it)

GX

GY

GZ

GS

0

GU

GV

GW

UN

VN

WN

Power

supply f

or

IGBT upp

er

ar

m

(U

)

P

(N

)

(N

)

(N

)

(N

)

(N

)

(N

)

(N

)

(N

)

(N

)

(N

)

(N

)

Curre

nt

detect (

U)

Curre

nt

detect (W

)

Power supply

for

control (+-

12

V)

IUF

IWF

PV12

L

NV

12

Te

m

p.

er

ro

r

detect

OH

(L

)

(L

)

(L

)

(L

)

(L

)

(C

M1

)

(N

)

Power sup

ply

for contr

ol

(5

V)

Power sup

ply

for GA (

5V

)

Power sup

ply

for I/F (2

4V

)

PV5

L

PV5N

PV24

CM

1

Fan rotat

ion

error det

ec

t

PV24

CM

1

UV

UV detect

R0

T0

FA

N

Opt

coup

ler

Inst. power

failure detec

t

Opt

coup

ler

IPL

GA

(5V)

BRD

Voltage divisi

on

circu

it

Pha

se

volta

ge

detection

OV detecti

on

f - theta detection

Isolation A

M

P

Opt

coup

ler

Opt

coup

ler

VDC

MV

F1

MV

F2

IUF

IWF

TH

F

TH

P

THCO

M

PV12

L

NV

12

Opt

coup

ler

FF

LT

PV5

PV5

NV

12

L

PV12

PV5

L

PV5

L

L

(N

)

(N

)

(N

)

(L

)

(L

)

(N

)

PV24

PV24

CM

1

CM

1

IPL

(C

M1

)

(C

M

1)

(N

)

(N

)

(L

)

Opt

coup

ler

GS

High sp

ee

d

opt coup

ler

WS

VS

US

Opt

coup

ler

PH

F

Opt

coup

ler

TRIP

GASRS

GASCK

GARES

TRES

GARXD

Opt coup

ler

Opt

coup

ler

Main boar

d

"H" w

h

e

n

BRD i

s

O

N

+-3.3Vpeak a

t

rated ou

tp

u

t

BRD

IUF

IWF

VDC

"L" wh

e

n

tripping

TRIP

SH Microprocessor (3

.4

5V

)

"L" wh

e

n

phase l

o

ss

PH

F

for communicati

o

n

.

Operates dur

in

g

stoppi

n

g

.

GASRS

GASCK

GARES

TRES

GARXD

WS

VS

US

PWM sig

n

a

l

"L" wh

e

n

ga

te

suppr

e

ss

GS

apprx. 6.4

V

at

OV lev

el

(U

-V

)

(W

-U

)

Te

m

p

.

detection

o

n

heats

in

k

Te

m

p

.

detection

o

n

PCB

TH

F

TH

P

PV5

PV5

PV5

L

PV5

L

L

Power supply for digital s

ignal

Signals for freq.

match

in

g

MV

F1

MV

F2

PV12

L

NV

12

NV

12

L

PV12

Power supply for analog s

ignal

FF

LT

PV24

PV24

CM

1

CM

1

Power supply for I/F

"H" w

h

e

n

inst. pow

e

r

failure

IPL

(L

)

(C

M1

)

(C

M1

)

(C

M1

)

(C

M1

)

(L

)

(L

)

(L

)

(L

)

(L

)

(L

)

(L

)

(L

)

(L

)

(L

)

(L

)

(L

)

(L

)

(L

)

(L

)

(L

)

(L

)

(L

)

(L

)

(L

)

(L

)

(L

)

(L

)

(L

)

(L

)

(L

)

(L

)

(L

)

Control bo

a

rd

Output

shutoff circuit

Overcur

re

nt

detection

Emer

genc

y

Stop

P24

A/D

CM1

CM1

PLC

FW

8

7

6

5

4

3

2

1

TH

FM

CM2

15

14

13

12

11

AL0

AL1

AL2

H

O

O2

OI

L

AM

AMI

AVR

A/D

12bit

D/A

10bit

Slide switch S1

40 signals between

M

ain

board and contro

l boar

d

(L

)

Power

supply f

or

IGBT upp

er

ar

m

(V

)

Power

supply f

or

IGBT upp

er

ar

m

(W

)

L

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