Altera Mentor Verification IP Altera Edition AMBA AXI4-Stream - Manual (Page 213)

Mentor Verification IP AE AMBA AXI4-Stream User Guide, V10.3 213
April 2014
Appendix B
VHDL Master and Slave Test Programs
This appendix contains two VHDL code examples: one for the master BFM, and the other for
the slave BFM.
VHDL Master BFM Code Example
The example code in this section is a simplified AXI4-Stream slave that illustrates how you can
use the mgc_axi4stream_master BFM.
--
*************************************************************************
****
--
-- Copyright 2007-2013 Mentor Graphics Corporation
-- All Rights Reserved.
--
-- THIS WORK CONTAINS TRADE SECRET AND PROPRIETARY INFORMATION WHICH IS
THE PROPERTY OF
-- MENTOR GRAPHICS CORPORATION OR ITS LICENSORS AND IS SUBJECT TO LICENSE
TERMS.
--
--
*************************************************************************
****
-- This is a simple example of an axi4stream master to demonstrate the
mgc_axi4stream_master BFM usage.
--
-- This master performs a directed test, initiating 10 sequential
packets at higher abstraction level
-- followed by 10 transfer at phase level.
library ieee ;
use ieee.std_logic_1164.all;
library work;
use work.all;
use work.mgc_axi4stream_bfm_pkg.all;
entity master_test_program is
generic(
AXI4_ID_WIDTH : integer := 18;
AXI4_USER_WIDTH : integer := 8;
AXI4_DEST_WIDTH : integer := 18;
AXI4_DATA_WIDTH : integer := 1024;
index : integer range 0 to 511 := 0
);