Altera Mentor Verification IP Altera Edition AMBA AXI4-Stream - Manual (Page 55)

Mentor Verification IP AE AMBA AXI4-Stream User Guide, V10.3 55
April 2014
Chapter 5
SystemVerilog Monitor BFM
This section provides information about the SystemVerilog monitor BFM. It has an API that
contains tasks and functions to configure the BFM and to access the dynamic
Transaction
Record during the life of the transaction.
Inline Monitor Connection
The connection of a monitor BFM to a test environment differs from that of a master and slave
BFM. It is wrapped within an inline monitor interface and connected inline between a master
and slave, as shown in
Figure 5-1 . It has separate master and slave ports, and monitors protocol
traffic between a master and slave. The monitor has access to all the facilities provided by the
monitor BFM.
Figure 5-1. Inline Monitor Connection Diagram
Monitor BFM Protocol Support
The monitor BFM supports the full AMBA AXI4-Stream Protocol.
Monitor Timing and Events
For detailed timing diagrams of the protocol bus activity, refer to the relevant AMBA
AXI4-Stream Protocol Specification chapter, which you can reference for details of the
following monitor BFM API timing and events.
The AMBA AXI4-Stream Specification does not define any timescale or clock period with
signal events sampled and driven at rising ACLK edges. Therefore, the monitor BFM does not
Slave Master
Inline monitor
Master port Slave port
Monitor