Freescale Semiconductor MC68HC908MR32 - Manual (Page 107)

Port D
MC68HC908MR32 • MC68HC908MR16 Data Sheet, Rev. 6.1
Freescale Semiconductor 107
Figure 10-10 shows the port C I/O logic.
Figure 10-10. Port C I/O Circuit
When bit DDRCx is a logic 1, reading address $0002 reads the PTCx data latch. When bit DDRCx is a
logic 0, reading address $0002 reads the voltage level on the pin. The data latch can always be written,
regardless of the state of its data direction bit.
Table 10-3 summarizes the operation of the port C pins.
10.5 Port D
Port D is a 7-bit, input-only port that shares its pins with the pulse width modulator for motor control
module (PMC).
The port D data register (PTD) contains a data latch for each of the seven port pins.
PTD[6:0] — Port D Data Bits
These read/write bits are software programmable. Reset has no effect on port D data.
Table 10-3. Port C Pin Functions
DDRC Bit PTC Bit I/O Pin Mode Accesses to DDRC Accesses to PTC
Read/Write Read Write
0 X
(1)
1. X = don’t care
Input, Hi-Z
(2)
2. Hi-Z = high impedance
DDRC[6:0] Pin PTC[6:0]
(3)
3. Writing affects data register, but does not affect input.
1 X Output DDRC[6:0] PTC[6:0] PTC[6:0]
Address: $0003
Bit 7 6 5 4 3 2 1 Bit 0
Read: 0 PTD6 PTD5 PTD4 PTD3 PTD2 PTD1 PTD0
Write: R R R R R R R R
Reset: Unaffected by reset
R = Reserved
Figure 10-11. Port D Data Register (PTD)
READ DDRC ($0006)
WRITE DDRC ($0006)
RESET
WRITE PTC ($0002)
READ PTC ($0002)
PTCx
DDRCx
PTCx
INTERNAL
DAT
A BU
S