Freescale Semiconductor MC68HC908MR32 - Manual (Page 61)

Functional Description
MC68HC908MR32 • MC68HC908MR16 Data Sheet, Rev. 6.1
Freescale Semiconductor 61
The PLL also may operate in manual mode (AUTO = 0). Manual mode is used by systems that do not
require an indicator of the lock condition for proper operation. Such systems typically operate well below
f
BUSMAX
and require fast startup. These conditions apply when in manual mode:
• ACQ is a writable control bit that controls the mode of the filter. Before turning on the PLL in manual
mode, the ACQ bit must be clear.
• Before entering tracking mode (ACQ = 1), software must wait a given time, t
ACQ
(see 4.8
Acquisition/Lock Time Specifications ), after turning on the PLL by setting PLLON in the PLL control
register (PCTL).
• Software must wait a given time, t
AL
, after entering tracking mode before selecting the PLL as the
clock source to CGMOUT (BCS = 1).
• The LOCK bit is disabled.
• CPU interrupts from the CGM are disabled.
4.3.2.4 Programming the PLL
Use this 9-step procedure to program the PLL. Table 4-1 lists the variables used and their meaning.
1. Choose the desired bus frequency, f
BUSDES
.
Example: f
BUSDES
= 8 MHz
2. Calculate the desired VCO frequency, f
VCLKDES
.
f
VCLKDES
= 4 x f
BUSDES
Example: f
VCLKDES
= 4 x 8 MHz = 32 MHz
3. Using a reference frequency, f
RCLK
, equal to the crystal frequency, calculate the VCO frequency
multiplier, N. Round the result to the nearest integer.
4. Calculate the VCO frequency, f
VCLK
.
Table 4-1. Variable Definitions
Variable Definition
f
BUSDES
Desired bus clock frequency
f
VCLKDES
Desired VCO clock frequency
f
RCLK
Chosen reference crystal frequency
f
VCLK
Calculated VCO clock frequency
f
BUS
Calculated bus clock frequency
f
NOM
Nominal VCO center frequency
f
VRS
Shifted FCO center frequency
f
VCLKDES
f
RCLK
N =
Example: N =
32 MHz
4 MHz
= 8 MHz
f
VCLK
= N x f
RCLK
Example: f
VCLK
= 8 x 4 MHz = 32 MHz