Handshake timing, 8255 emulation, Figure 54. trigger input signal timing – National Instruments DIO 6533 User Manual

Page 63: Handshake timing -4, 8255 emulation -4, Figure 5-4, Trigger input signal timing -4

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Chapter 5

Signal Timing

DIO 6533 User Manual

5-4

© National Instruments Corporation

respectively. Using only a start trigger, you can do posttrigger data
acquisition. A stop trigger enables you to do pretrigger data acquisition,
or combined pretrigger and posttrigger data acquisition. After detecting
the stop trigger, the 6533 device begins counting the post-stop-trigger
portion of the data acquisition. Figure 5-4 shows trigger pulse timing,
where t

w

is pulse width.

Figure 5-4. Trigger Input Signal Timing

Instead of a pulse on the I/O connector, you can also use digital pattern
detection as a trigger to start or stop an input operation. See Chapter 3,

Hardware Overview

, for more information about pattern detection.

Handshake Timing

This section describes the 6533 device two-way handshaking modes
and the timing specifications of each mode.

In handshaking, the ACK signal always conveys information about
when the 6533 device is ready for a transfer. The REQ signal conveys
information about when the peripheral device is ready for a transfer.

Note: Depending on the protocol and the direction of the transfer, either an ACK

or a REQ signal can occur first in the handshaking sequence.

8255 Emulation

The 8255 emulation mode handshakes in a manner compatible with an
8255 or 82C55 Programmable Peripheral Interface (PPI). The 8255 and
82C55 PPIs are digital I/O chips used on many digital DAQ devices,
such as the National Instruments PC-DIO-24 and PC-DIO-96/PnP.

Rising-Edge

Polarity

Falling-Edge

Polarity

t w

t w = 10 ns minimum

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