National Instruments DIO 6533 - Manual (Page 84)

Chapter 5 Signal Timing
© National Instruments Corporation 5-25 DIO 6533 User Manual
Figure 5-21 shows a write transfer in trailing edge mode.
Figure 5-21. Trailing-Edge Mode Output
Trailing-Edge Mode Timing Specifications
Figures 5-22 and 5-23 show the timing diagrams for trailing-edge
mode.
Wait
For
Data
Wait
For
REQ
Programmable
Delay
Programmable
Delay
Wait
For
REQ
When REQ
Unasserted
When 6533 Device
Has Data to Output,
Output Data*
Clear
ACK
When REQ
Asserted
Initial State
ACK Cleared
Send
ACK
* With REQ-edge latching enabled, the data written is
delayed until the next inactive-going REQ edge.