Figure 510. levelack mode input timing, Figure 5-10. level-ack mode input timing -12, Figures 5-10 – National Instruments DIO 6533 User Manual

Page 71

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Chapter 5

Signal Timing

DIO 6533 User Manual

5-12

© National Instruments Corporation

Figure 5-10. Level-ACK Mode Input Timing

Parameter

Description

Minimum

Maximum

Input Parameters

t

rr*

REQ pulse width

75

t

r*r

REQ inactive duration

75

t

ar

ACK to next REQ

0

t

dir(1)

Input data setup to REQ active
(with REQ-edge latching)

0

t

rdi

Input data hold from REQ active
(with REQ-edge latching)

10

t

dir(2)

Input data setup to REQ
(with REQ-edge latching disabled)

0

t

adi

Input data hold from ACK
(with REQ-edge latching disabled)

0

Output Parameters

t

aa*

ACK pulse width

225

t

ra*

REQ to ACK inactive

100

200

All timing values are in nanoseconds.

REQ

ACK

Input Data

(REQ-edge latching)

Input Data

(REQ-edge

latching disabled)

tr*r

tra*

tdir(2)

tadi

tar

taa*

trr*

trdi

tdir(1)

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