25 mc y padding size setting register (mcypr) – Renesas SH7781 User Manual
Page 1036

20. Graphics Data Translation Accelerator (GDTA)
Rev.1.00 Jan. 10, 2008 Page 1006 of 1658
REJ09B0261-0100
20.3.25
MC Y Padding Size Setting Register (MCYPR)
MCYPR is in the MC register block and sets the input Y padding size in byte units.
16
17
18
19
20
21
22
23
24
25
26
27
28
29
31
30
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
⎯
⎯
⎯
⎯
⎯
⎯
⎯
⎯
⎯
⎯
⎯
⎯
⎯
⎯
⎯
⎯
⎯
⎯
⎯
⎯
⎯
⎯
⎯
⎯
⎯
⎯
⎯
⎯
⎯
⎯
⎯
⎯
BIt:
Initial value:
R/W:
0
1
2
3
4
5
6
7
8
9
10
11
12
13
15
14
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
MC_YP
⎯
⎯
⎯
⎯
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
⎯
⎯
⎯
⎯
BIt:
Initial value:
R/W:
Bit Bit
Name
Initial
Value R/W Description
31 to 12
⎯ All
0
⎯ Reserved
These bits are always read as 0. The write value should
always be 0.
11 to 0 MC_YP
All 0
R/W
Input Y padding size setting
Should be set by the number of bytes.
Notes: 1. Addition is performed taking that 1 pixel = 1 byte.
2. MCWR (bytes) + MCYPR (bytes) should be 16 bytes x n (n: an integer greater than 0)