37 port l pull-up control register (plpupr) – Renesas SH7781 User Manual
Page 1468
28. General Purpose I/O Ports (GPIO)
Rev.1.00 Jan. 10, 2008 Page 1438 of 1658
REJ09B0261-0100
28.2.37
Port L Pull-Up Control Register (PLPUPR)
PLPUPR is an 8-bit readable/writable register that performs the pull-up control for each of the port
L7 to L0 (PL7 to PL0) pins when the port L pins are used by peripheral modules. When the port L
pins are used by the GPIO, the setting for this register is ignored.
0
1
2
3
4
5
6
7
1
1
1
1
1
1
1
1
PL0
PUPR
PL1
PUPR
PL2
PUPR
PL3
PUPR
PL4
PUPR
PL5
PUPR
PL6
PUPR
PL7
PUPR
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Bit:
Initial value:
R/W:
Bit Bit
Name
Initial
value R/W Description
7 PL7PUPR
1 R/W
6 PL6PUPR
1 R/W
5 PL5PUPR
1 R/W
4 PL4PUPR
1 R/W
3 PL3PUPR
1 R/W
2 PL2PUPR
1 R/W
1 PL1PUPR
1 R/W
Pull-up of each Port L pin can be controlled
independently.
0: PLn pull-up off
1: PLn pull-up on
0 PL0PUPR
1 R/W
Note: n = 7 to 0