Rockwell Automation SA3100 Diag,Troublesht,Startup,Guide - Manual (Page 20)

2-6 Diagnostics, Troubleshooting, and Start-Up Guidelines
The following conditions will cause the MCR output to turn off:
• Absence of the RPI signal
• Occurrence of a drive fault
• Control algorithm is turned off (PMI_RUN@ = 0)
After any of the above conditions occurs, the PMI Regulator will wait for current
feedback to be less than 2% of rated motor current multiplied by the motor overload
ratio. The PMI Regulator will then turn off the MCR output. If this current level has not
been reached within 300 msec, the MCR output will be turned off regardless.
In addition, if the RPI signal is removed, the MCR output and gate power will be
removed under hardware control within approximately 0.5 seconds of the removal of
the RPI signal to provide an additional interlock. This is done regardless of the actions
taken by the PMI.
2.4.2 Drive Warnings
The PMI Regulator will check for conditions that are not serious enough to shut down
the drive, but may affect its performance. If the PMI Regulator detects any of the
conditions described in the Drive Warning register, it will set the appropriate bit but will
NOT shut down the drive. The user must ensure that the application task tests the
Drive Warning register (203/1203) and takes any appropriate action if a warning
condition is detected.
The PMI Regulator will also set the Warning Detected bit (register 200/1200, bit 9,
WRN@) when a drive warning has been detected.
Appendix B provides a complete description of the Drive Warning register. Except for
I/O faults, drive warnings are not indicated by LEDs (an I/O fault will turn on the I/O
FLT LED on the PMI Regulator).
Drive warnings are not displayed in the UDC task’s
error log.
2.4.3 How to Clear the Drive Fault and Drive Warning Registers
After a drive fault has been detected, the programmer must do the following before the
drive can be restarted:
Step 1. Reset the command bit that is currently set in the Drive Control register
(100/1100).
Step 2. Correct the fault.
Step 3. Set and reset the Fault Reset bit (register 100/1100, bit 8, FLT_RST@) to
clear the Drive Fault register (200/1200). (Note that the Fault Reset bit is
edge sensitive.)
Step 4. Set the desired command bit in the Drive Control register (100/1100).
After a drive warning has been detected, the programmer can clear the entire Drive
Warning register by setting and resetting the Warning Reset bit (register 100/1100,
bit 9, WRN_RST@). (Note that the Warning Reset bit is edge sensitive.)