Altera Arria V SoC Development Board - Manual (Page 38)

2–30 Chapter 2: Board Components
Components and Interfaces
Arria V SoC Development Board July 2014 Altera Corporation
Reference Manual
A7 FMC_DP_M2C_N2 Y38 PCML Receive channel
A11 FMC_DP_M2C_N3 T38 PCML Receive channel
A15 FMC_DP_M2C_N4 P38 PCML Receive channel
A19 FMC_DP_M2C_N5 K38 PCML Receive channel
B17 FMC_DP_M2C_N6 H38 PCML Receive channel
B13 FMC_DP_M2C_N7 D38 PCML Receive channel
C6 FMC_DP_M2C_P0 AF39 PCML Receive channel
A2 FMC_DP_M2C_P1 AB39 PCML Receive channel
A6 FMC_DP_M2C_P2 Y39 PCML Receive channel
A10 FMC_DP_M2C_P3 T39 PCML Receive channel
A14 FMC_DP_M2C_P4 P39 PCML Receive channel
A18 FMC_DP_M2C_P5 K39 PCML Receive channel
B16 FMC_DP_M2C_P6 H39 PCML Receive channel
B12 FMC_DP_M2C_P7 D39 PCML Receive channel
C34 FMC_GA0 C23 2.5-V CMOS FMC geographical address 0
D35 FMC_GA1 P25 2.5-V CMOS FMC geographical address 1
D4 FMC_GBTCLK_M2C_P0 AC31 LVDS Transceiver reference clock 0
D5 FMC_GBTCLK_M2C_N0 AC32 LVDS Transceiver reference clock 0
B20 FMC_GBTCLK_M2C_P1 AA31 LVDS Transceiver reference clock 1
B21 FMC_GBTCLK_M2C_N1 AA32 LVDS Transceiver reference clock 1
E18 FMC_GPIO0 B24 2.5-V CMOS
FMC general purpose IO bit 0 (part of the partially
populated HPS connector signal group)
E19 FMC_GPIO1 C24 2.5-V CMOS
FMC general purpose IO bit 1 (part of the partially
populated HPS connector signal group)
K19 FMC_GPIO2 F24 2.5-V CMOS
FMC general purpose IO bit 2 (part of the partially
populated HPS connector signal group)
K20 FMC_GPIO3 G24 2.5-V CMOS
FMC general purpose IO bit 3 (part of the partially
populated HPS connector signal group)
J21 FMC_GPIO4 H24 2.5-V CMOS
FMC general purpose IO bit 4 (part of the partially
populated HPS connector signal group)
J22 FMC_GPIO5 J24 2.5-V CMOS
FMC general purpose IO bit 5 (part of the partially
populated HPS connector signal group)
K22 FMC_GPIO6 B27 2.5-V CMOS
FMC general purpose IO bit 6 (part of the partially
populated HPS connector signal group)
K23 FMC_GPIO7 C27 2.5-V CMOS
FMC general purpose IO bit 7 (part of the partially
populated HPS connector signal group)
D30 FMC_JTAG_TDI — 2.5-V CMOS JTAG data in
D31 FMC_JTAG_TDO — 2.5-V CMOS JTAG data out
D33 FMC_JTAG_TMS — 2.5-V CMOS JTAG mode select
D34 FMC_JTAG_RST — 2.5-V CMOS JTAG mode reset
Table 2–21. FMC Port A Pin Assignments, Schematic Signal Names, and Functions (Part 2 of 5)
Board
Reference
(J26)
Schematic
Signal Name
Arria V SoC
Pin Number
I/O Standard Description